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18th ACM SIGPLAN/SIGBED Conference on Languages, Compilers, and Tools for Embedded Systems (LCTES 2017), June 21–22, 2017,
Barcelona, Spain
Frontmatter
Compiler Optimization for Embedded Systems
AOT vs. JIT: Impact of Profile Data on Code Quality
April W. Wade,
Prasad A. Kulkarni, and
Michael R. Jantz
(University of Kansas, USA; University of Tennessee, USA)
@InProceedings{LCTES17p1,
author = {April W. Wade and Prasad A. Kulkarni and Michael R. Jantz},
title = {AOT vs. JIT: Impact of Profile Data on Code Quality},
booktitle = {Proc.\ LCTES},
publisher = {ACM},
pages = {1-0},
doi = {},
year = {2017},
}
Adaptive Optimization for OpenCL Programs on Embedded Heterogeneous Systems
Ben Taylor,
Vicent Sanz Marco, and
Zheng Wang
(Lancaster University, UK)
@InProceedings{LCTES17p11,
author = {Ben Taylor and Vicent Sanz Marco and Zheng Wang},
title = {Adaptive Optimization for OpenCL Programs on Embedded Heterogeneous Systems},
booktitle = {Proc.\ LCTES},
publisher = {ACM},
pages = {11-10},
doi = {},
year = {2017},
}
NOLINKDECO
Auto-vectorization for Image Processing DSLs
Oliver Reiche,
Christof Kobylko,
Frank Hannig, and
Jürgen Teich
(University of Erlangen-Nuremberg, Germany)
@InProceedings{LCTES17p21,
author = {Oliver Reiche and Christof Kobylko and Frank Hannig and Jürgen Teich},
title = {Auto-vectorization for Image Processing DSLs},
booktitle = {Proc.\ LCTES},
publisher = {ACM},
pages = {21-20},
doi = {},
year = {2017},
}
Dynamic Translation of Structured Loads/Stores and Register Mapping for Architectures with SIMD Extensions
Sheng-Yu Fu,
Ding-Yong Hong,
Yu-Ping Liu,
Jan-Jan Wu, and
Wei-Chung Hsu
(National Taiwan University, Taiwan; Academia Sinica, Taiwan)
@InProceedings{LCTES17p31,
author = {Sheng-Yu Fu and Ding-Yong Hong and Yu-Ping Liu and Jan-Jan Wu and Wei-Chung Hsu},
title = {Dynamic Translation of Structured Loads/Stores and Register Mapping for Architectures with SIMD Extensions},
booktitle = {Proc.\ LCTES},
publisher = {ACM},
pages = {31-30},
doi = {},
year = {2017},
}
Abstraction, Modelling, and Scheduling for IoT and Embedded Systems
Optimal Functional Unit Assignment and Voltage Selection for Pipelined MPSoC with Guaranteed Probability on Time Performance
Weiwen Jiang,
Edwin H.-M. Sha,
Qingfeng Zhuge,
Hailiang Dong, and
Xianzhang Chen
(Chongqing University, China)
@InProceedings{LCTES17p41,
author = {Weiwen Jiang and Edwin H.-M. Sha and Qingfeng Zhuge and Hailiang Dong and Xianzhang Chen},
title = {Optimal Functional Unit Assignment and Voltage Selection for Pipelined MPSoC with Guaranteed Probability on Time Performance},
booktitle = {Proc.\ LCTES},
publisher = {ACM},
pages = {41-40},
doi = {},
year = {2017},
}
Integrated IoT Programming with Selective Abstraction
Gyeongmin Lee,
Seonyeong Heo,
Bongjun Kim,
Jong Kim, and
Hanjun Kim
(POSTECH, South Korea)
@InProceedings{LCTES17p51,
author = {Gyeongmin Lee and Seonyeong Heo and Bongjun Kim and Jong Kim and Hanjun Kim},
title = {Integrated IoT Programming with Selective Abstraction},
booktitle = {Proc.\ LCTES},
publisher = {ACM},
pages = {51-50},
doi = {},
year = {2017},
}
Integrating Task Scheduling and Cache Locking for Multicore Real-Time Embedded Systems
Wenguang Zheng,
Hui Wu, and
Chuanyao Nie
(Tianjin University of Technology, China; UNSW, Australia)
@InProceedings{LCTES17p71,
author = {Wenguang Zheng and Hui Wu and Chuanyao Nie},
title = {Integrating Task Scheduling and Cache Locking for Multicore Real-Time Embedded Systems},
booktitle = {Proc.\ LCTES},
publisher = {ACM},
pages = {71-70},
doi = {},
year = {2017},
}
Non-volatile Memory/Processor and RTOS
Towards Memory-Efficient Processing-in-Memory Architecture for Convolutional Neural Networks
Yi Wang,
Mingxu Zhang, and
Jing Yang
(Shenzhen University, China; Institute of Computing Technology at Chinese Academy of Sciences, China; Harbin Institute of Technology, China)
@InProceedings{LCTES17p81,
author = {Yi Wang and Mingxu Zhang and Jing Yang},
title = {Towards Memory-Efficient Processing-in-Memory Architecture for Convolutional Neural Networks},
booktitle = {Proc.\ LCTES},
publisher = {ACM},
pages = {81-80},
doi = {},
year = {2017},
}
Unified nvTCAM and sTCAM Architecture for Improving Packet Matching Performance
Xianzhong Ding,
Zhiyong Zhang,
Zhiping Jia,
Lei Ju,
Mengying Zhao, and
Huawei Huang
(Shandong University, China; University of Aizu, Japan)
@InProceedings{LCTES17p91,
author = {Xianzhong Ding and Zhiyong Zhang and Zhiping Jia and Lei Ju and Mengying Zhao and Huawei Huang},
title = {Unified nvTCAM and sTCAM Architecture for Improving Packet Matching Performance},
booktitle = {Proc.\ LCTES},
publisher = {ACM},
pages = {91-90},
doi = {},
year = {2017},
}
A Lightweight Progress Maximization Scheduler for Non-volatile Processor under Unstable Energy Harvesting
Chen Pan,
Mimi Xie,
Yongpan Liu,
Yanzhi Wang,
Chun Jason Xue,
Yuangang Wang,
Yiran Chen, and
Jingtong Hu
(Oklahoma State University, USA; Tsinghua University, China; Syracuse University, USA; City University of Hong Kong, China; Huawei Technologies, China; Duke University, USA)
@InProceedings{LCTES17p101,
author = {Chen Pan and Mimi Xie and Yongpan Liu and Yanzhi Wang and Chun Jason Xue and Yuangang Wang and Yiran Chen and Jingtong Hu},
title = {A Lightweight Progress Maximization Scheduler for Non-volatile Processor under Unstable Energy Harvesting},
booktitle = {Proc.\ LCTES},
publisher = {ACM},
pages = {101-100},
doi = {},
year = {2017},
}
OSEK-V: Application-Specific RTOS Instantiation in Hardware
Christian Dietrich and
Daniel Lohmann
(Leibniz Universität Hannover, Germany)
@InProceedings{LCTES17p111,
author = {Christian Dietrich and Daniel Lohmann},
title = {OSEK-V: Application-Specific RTOS Instantiation in Hardware},
booktitle = {Proc.\ LCTES},
publisher = {ACM},
pages = {111-110},
doi = {},
year = {2017},
}
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