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2017 IEEE/ACM International Symposium on Code Generation and Optimization (CGO), February 4–8, 2017,
Austin, USA
Frontmatter
Main Research Papers
Shared Memory
Legato: End-to-End Bounded Region Serializability Using Commodity Hardware Transactional Memory
Aritra Sengupta,
Man Cao,
Michael D. Bond, and
Milind Kulkarni
(Ohio State University, USA; Purdue University, USA)
@InProceedings{CGO17p1,
author = {Aritra Sengupta and Man Cao and Michael D. Bond and Milind Kulkarni},
title = {Legato: End-to-End Bounded Region Serializability Using Commodity Hardware Transactional Memory},
booktitle = {Proc.\ CGO},
publisher = {IEEE},
pages = {1-0},
doi = {},
year = {2017},
}
Automatic Detection of Extended Data-Race-Free Regions
Alexandra Jimborean,
Jonatan Waern,
Per Ekemark,
Stefanos Kaxiras, and
Alberto Ros
(Uppsala University, Sweden; University of Murcia, Spain)
@InProceedings{CGO17p16,
author = {Alexandra Jimborean and Jonatan Waern and Per Ekemark and Stefanos Kaxiras and Alberto Ros},
title = {Automatic Detection of Extended Data-Race-Free Regions},
booktitle = {Proc.\ CGO},
publisher = {IEEE},
pages = {16-15},
doi = {},
year = {2017},
}
FinePar: Irregularity-Aware Fine-Grained Workload Partitioning on Integrated Architectures
Feng Zhang,
Bo Wu,
Jidong Zhai,
Bingsheng He, and
Wenguang Chen
(Tsinghua University, China; Colorado School of Mines, USA; National University of Singapore, Singapore)
@InProceedings{CGO17p29,
author = {Feng Zhang and Bo Wu and Jidong Zhai and Bingsheng He and Wenguang Chen},
title = {FinePar: Irregularity-Aware Fine-Grained Workload Partitioning on Integrated Architectures},
booktitle = {Proc.\ CGO},
publisher = {IEEE},
pages = {29-28},
doi = {},
year = {2017},
}
GPU Optimization
TwinKernels: An Execution Model to Improve GPU Hardware Scheduling at Compile Time
Xiang Gong,
Zhongliang Chen,
Amir Kavyan Ziabari,
Rafael Ubal, and
David Kaeli
(Northeastern University, USA)
@InProceedings{CGO17p44,
author = {Xiang Gong and Zhongliang Chen and Amir Kavyan Ziabari and Rafael Ubal and David Kaeli},
title = {TwinKernels: An Execution Model to Improve GPU Hardware Scheduling at Compile Time},
booktitle = {Proc.\ CGO},
publisher = {IEEE},
pages = {44-43},
doi = {},
year = {2017},
}
Taming Warp Divergence
Jayvant Anantpur and
R. Govindarajan
(IISc Bangalore, India)
@InProceedings{CGO17p59,
author = {Jayvant Anantpur and R. Govindarajan},
title = {Taming Warp Divergence},
booktitle = {Proc.\ CGO},
publisher = {IEEE},
pages = {59-58},
doi = {},
year = {2017},
}
Dynamic Buffer Overflow Detection for GPGPUs
Christopher Erb,
Mike Collins, and
Joseph L. Greathouse
(AMD Research, USA)
@InProceedings{CGO17p74,
author = {Christopher Erb and Mike Collins and Joseph L. Greathouse},
title = {Dynamic Buffer Overflow Detection for GPGPUs},
booktitle = {Proc.\ CGO},
publisher = {IEEE},
pages = {74-73},
doi = {},
year = {2017},
}
Lift: A Functional Data-Parallel IR for High-Performance GPU Code Generation
Michel Steuwer,
Toomas Remmelg, and
Christophe Dubach
(University of Edinburgh, UK)
@InProceedings{CGO17p87,
author = {Michel Steuwer and Toomas Remmelg and Christophe Dubach},
title = {Lift: A Functional Data-Parallel IR for High-Performance GPU Code Generation},
booktitle = {Proc.\ CGO},
publisher = {IEEE},
pages = {87-86},
doi = {},
year = {2017},
}
Best Paper Nominees
Synthesizing Benchmarks for Predictive Modeling
Chris Cummins,
Pavlos Petoumenos,
Zheng Wang, and
Hugh Leather
(University of Edinburgh, UK; Lancaster University, UK)
@InProceedings{CGO17p102,
author = {Chris Cummins and Pavlos Petoumenos and Zheng Wang and Hugh Leather},
title = {Synthesizing Benchmarks for Predictive Modeling},
booktitle = {Proc.\ CGO},
publisher = {IEEE},
pages = {102-101},
doi = {},
year = {2017},
}
ThinLTO: Scalable and Incremental LTO
Teresa Johnson,
Mehdi Amini, and
Xinliang David Li
(Google, USA; Apple, USA)
@InProceedings{CGO17p130,
author = {Teresa Johnson and Mehdi Amini and Xinliang David Li},
title = {ThinLTO: Scalable and Incremental LTO},
booktitle = {Proc.\ CGO},
publisher = {IEEE},
pages = {130-129},
doi = {},
year = {2017},
}
Automatic Generation of Fast BLAS3-GEMM: A Portable Compiler Approach
Xing Su,
Xiangke Liao, and
Jingling Xue
(National University of Defense Technology, China; UNSW, Australia)
@InProceedings{CGO17p143,
author = {Xing Su and Xiangke Liao and Jingling Xue},
title = {Automatic Generation of Fast BLAS3-GEMM: A Portable Compiler Approach},
booktitle = {Proc.\ CGO},
publisher = {IEEE},
pages = {143-142},
doi = {},
year = {2017},
}
Memory Dependencies
Pointer Disambiguation via Strict Inequalities
Maroua Maalej,
Vitor Paisante,
Pedro Ramos,
Laure Gonnord, and
Fernando Magno Quintão Pereira
(University of Lyon, France; LIP, France; Federal University of Minas Gerais, Brazil)
@InProceedings{CGO17p158,
author = {Maroua Maalej and Vitor Paisante and Pedro Ramos and Laure Gonnord and Fernando Magno Quintão Pereira},
title = {Pointer Disambiguation via Strict Inequalities},
booktitle = {Proc.\ CGO},
publisher = {IEEE},
pages = {158-157},
doi = {},
year = {2017},
}
A Collaborative Dependence Analysis Framework
Nick P. Johnson,
Jordan Fix,
Stephen R. Beard,
Taewook Oh,
Thomas B. Jablin, and
David I. August
(Princeton University, USA; University of Illinois at Urbana-Champaign, USA; Multicoreware, USA)
@InProceedings{CGO17p173,
author = {Nick P. Johnson and Jordan Fix and Stephen R. Beard and Taewook Oh and Thomas B. Jablin and David I. August},
title = {A Collaborative Dependence Analysis Framework},
booktitle = {Proc.\ CGO},
publisher = {IEEE},
pages = {173-172},
doi = {},
year = {2017},
}
Characterizing Data Organization Effects on Heterogeneous Memory Architectures
Apan Qasem,
Ashwin M. Aji, and
Gregory Rodgers
(Texas State University, USA; AMD Research, USA)
@InProceedings{CGO17p186,
author = {Apan Qasem and Ashwin M. Aji and Gregory Rodgers},
title = {Characterizing Data Organization Effects on Heterogeneous Memory Architectures},
booktitle = {Proc.\ CGO},
publisher = {IEEE},
pages = {186-185},
doi = {},
year = {2017},
}
Accelerators and Binary Translation
Clairvoyance: Look-Ahead Compile-Time Scheduling
Kim-Anh Tran,
Trevor E. Carlson,
Konstantinos Koukos,
Magnus Själander,
Vasileios Spiliopoulos,
Stefanos Kaxiras, and
Alexandra Jimborean
(Uppsala University, Sweden; Norwegian University of Science and Technology, Norway)
@InProceedings{CGO17p199,
author = {Kim-Anh Tran and Trevor E. Carlson and Konstantinos Koukos and Magnus Själander and Vasileios Spiliopoulos and Stefanos Kaxiras and Alexandra Jimborean},
title = {Clairvoyance: Look-Ahead Compile-Time Scheduling},
booktitle = {Proc.\ CGO},
publisher = {IEEE},
pages = {199-198},
doi = {},
year = {2017},
}
Phase-Aware Optimization in Approximate Computing
Subrata Mitra,
Manish K. Gupta,
Sasa Misailovic, and
Saurabh Bagchi
(Purdue University, USA; Microsoft, USA; University of Illinois at Urbana-Champaign, USA)
@InProceedings{CGO17p214,
author = {Subrata Mitra and Manish K. Gupta and Sasa Misailovic and Saurabh Bagchi},
title = {Phase-Aware Optimization in Approximate Computing},
booktitle = {Proc.\ CGO},
publisher = {IEEE},
pages = {214-213},
doi = {},
year = {2017},
}
A Space- and Energy-Efficient Code Compression/Decompression Technique for Coarse-Grained Reconfigurable Architectures
Bernhard Egger,
Hochan Lee,
Duseok Kang,
Mansureh S. Moghaddam,
Youngchul Cho,
Yeonbok Lee,
Sukjin Kim,
Soonhoi Ha, and
Kiyoung Choi
(Seoul National University, South Korea; Samsung Electronics, South Korea)
@InProceedings{CGO17p227,
author = {Bernhard Egger and Hochan Lee and Duseok Kang and Mansureh S. Moghaddam and Youngchul Cho and Yeonbok Lee and Sukjin Kim and Soonhoi Ha and Kiyoung Choi},
title = {A Space- and Energy-Efficient Code Compression/Decompression Technique for Coarse-Grained Reconfigurable Architectures},
booktitle = {Proc.\ CGO},
publisher = {IEEE},
pages = {227-226},
doi = {},
year = {2017},
}
Cross-ISA Machine Emulation for Multicores
Emilio G. Cota,
Paolo Bonzini,
Alex Bennée, and
Luca P. Carloni
(Columbia University, USA; Red Hat, Italy; Linaro, UK)
@InProceedings{CGO17p242,
author = {Emilio G. Cota and Paolo Bonzini and Alex Bennée and Luca P. Carloni},
title = {Cross-ISA Machine Emulation for Multicores},
booktitle = {Proc.\ CGO},
publisher = {IEEE},
pages = {242-241},
doi = {},
year = {2017},
}
Feedback Directed and Whole Program Optimization
Incremental Whole Program Optimization and Compilation
Patrick W. Sathyanathan,
Wenlei He, and
Ten H. Tzen
(Microsoft, USA)
@InProceedings{CGO17p257,
author = {Patrick W. Sathyanathan and Wenlei He and Ten H. Tzen},
title = {Incremental Whole Program Optimization and Compilation},
booktitle = {Proc.\ CGO},
publisher = {IEEE},
pages = {257-256},
doi = {},
year = {2017},
}
Optimizing Function Placement for Large-Scale Data-Center Applications
Guilherme Ottoni and
Bertrand Maher
(Facebook, USA)
@InProceedings{CGO17p270,
author = {Guilherme Ottoni and Bertrand Maher},
title = {Optimizing Function Placement for Large-Scale Data-Center Applications},
booktitle = {Proc.\ CGO},
publisher = {IEEE},
pages = {270-269},
doi = {},
year = {2017},
}
Minimizing the Cost of Iterative Compilation with Active Learning
William F. Ogilvie,
Pavlos Petoumenos,
Zheng Wang, and
Hugh Leather
(University of Edinburgh, UK; Lancaster University, UK)
@InProceedings{CGO17p283,
author = {William F. Ogilvie and Pavlos Petoumenos and Zheng Wang and Hugh Leather},
title = {Minimizing the Cost of Iterative Compilation with Active Learning},
booktitle = {Proc.\ CGO},
publisher = {IEEE},
pages = {283-282},
doi = {},
year = {2017},
}
Removing Checks in Dynamically Typed Languages through Efficient Profiling
Gem Dot,
Alejandro Martínez, and
Antonio González
(Universitat Politècnica de Catalunya, Spain; ARM, UK)
@InProceedings{CGO17p296,
author = {Gem Dot and Alejandro Martínez and Antonio González},
title = {Removing Checks in Dynamically Typed Languages through Efficient Profiling},
booktitle = {Proc.\ CGO},
publisher = {IEEE},
pages = {296-295},
doi = {},
year = {2017},
}
Reductions and Loops
Parallel Associative Reductions in Halide
Patricia Suriana,
Andrew Adams, and
Shoaib Kamil
(Google, USA; Adobe, USA)
@InProceedings{CGO17p322,
author = {Patricia Suriana and Andrew Adams and Shoaib Kamil},
title = {Parallel Associative Reductions in Halide},
booktitle = {Proc.\ CGO},
publisher = {IEEE},
pages = {322-321},
doi = {},
year = {2017},
}
Optimistic Loop Optimization
Johannes Doerfert,
Tobias Grosser, and
Sebastian Hack
(Saarland University, Germany; ETH Zurich, Switzerland)
@InProceedings{CGO17p335,
author = {Johannes Doerfert and Tobias Grosser and Sebastian Hack},
title = {Optimistic Loop Optimization},
booktitle = {Proc.\ CGO},
publisher = {IEEE},
pages = {335-334},
doi = {},
year = {2017},
}
Software Prefetching for Indirect Memory Accesses
Sam Ainsworth and
Timothy M. Jones
(University of Cambridge, UK)
@InProceedings{CGO17p350,
author = {Sam Ainsworth and Timothy M. Jones},
title = {Software Prefetching for Indirect Memory Accesses},
booktitle = {Proc.\ CGO},
publisher = {IEEE},
pages = {350-349},
doi = {},
year = {2017},
}
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