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32nd ACM SIGPLAN International Conference on Compiler Construction (CC 2023), February 25–26, 2023,
Montréal, QC, Canada
Frontmatter
Vector and Parallelism
Java Vector API: Benchmarking and Performance Analysis
Matteo Basso,
Andrea Rosà,
Luca Omini, and
Walter Binder
(USI Lugano, Lugano, Switzerland)
@InProceedings{CC23p1,
author = {Matteo Basso and Andrea Rosà and Luca Omini and Walter Binder},
title = {Java Vector API: Benchmarking and Performance Analysis},
booktitle = {Proc.\ CC},
publisher = {ACM},
pages = {1-0},
doi = {10.1145/3578360.3580265},
year = {2023},
}
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Compiling Discrete Probabilistic Programs for Vectorized Exact Inference
Jingwen Pan and
Amir Shaikhha
(University of Edinburgh, Edinburgh, UK)
@InProceedings{CC23p15,
author = {Jingwen Pan and Amir Shaikhha},
title = {Compiling Discrete Probabilistic Programs for Vectorized Exact Inference},
booktitle = {Proc.\ CC},
publisher = {ACM},
pages = {15-14},
doi = {10.1145/3578360.3580258},
year = {2023},
}
Publisher's Version
A Multi-threaded Fast Hardware Compiler for HDLs
Sheng-Hong Wang,
Hunter James Coffman,
Kenneth Mayer,
Sakshi Garg, and
Jose Renau
(University of California, Santa Cruz, USA)
@InProceedings{CC23p29,
author = {Sheng-Hong Wang and Hunter James Coffman and Kenneth Mayer and Sakshi Garg and Jose Renau},
title = {A Multi-threaded Fast Hardware Compiler for HDLs},
booktitle = {Proc.\ CC},
publisher = {ACM},
pages = {29-28},
doi = {10.1145/3578360.3580254},
year = {2023},
}
Publisher's Version
Scheduling and Tuning
A Deep Learning Model for Loop Interchange
Lina Mezdour,
Khadidja Kadem,
Massinissa Merouani,
Amina Selma Haichour,
Saman Amarasinghe, and
Riyadh Baghdadi
(NYU Abu Dhabi, Abu Dhabi, United Arab Emirates; ESI, Algiers, Algeria; Massachusetts Institute of Technology, USA)
@InProceedings{CC23p57,
author = {Lina Mezdour and Khadidja Kadem and Massinissa Merouani and Amina Selma Haichour and Saman Amarasinghe and Riyadh Baghdadi},
title = {A Deep Learning Model for Loop Interchange},
booktitle = {Proc.\ CC},
publisher = {ACM},
pages = {57-56},
doi = {10.1145/3578360.3580257},
year = {2023},
}
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(De/Re)-Compositions Expressed Systematically via MDH-Based Schedules
Ari Rasch,
Richard Schulze,
Denys Shabalin,
Anne Elster,
Sergei Gorlatch, and
Mary Hall
(University of Muenster, Muenster, Germany; Google, Switzerland; NTNU, Trondheim, Norway; University of Utah, USA)
@InProceedings{CC23p71,
author = {Ari Rasch and Richard Schulze and Denys Shabalin and Anne Elster and Sergei Gorlatch and Mary Hall},
title = {(De/Re)-Compositions Expressed Systematically via MDH-Based Schedules},
booktitle = {Proc.\ CC},
publisher = {ACM},
pages = {71-70},
doi = {10.1145/3578360.3580269},
year = {2023},
}
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Code Generation and Synthesis
A Sound and Complete Algorithm for Code Generation in Distance-Based ISA
Shu Sugita,
Toru Koizumi,
Ryota Shioya,
Hidetsugu Irie, and
Shuichi Sakai
(University of Tokyo, Tokyo, Japan)
@InProceedings{CC23p85,
author = {Shu Sugita and Toru Koizumi and Ryota Shioya and Hidetsugu Irie and Shuichi Sakai},
title = {A Sound and Complete Algorithm for Code Generation in Distance-Based ISA},
booktitle = {Proc.\ CC},
publisher = {ACM},
pages = {85-84},
doi = {10.1145/3578360.3580263},
year = {2023},
}
Publisher's Version
Matching Linear Algebra and Tensor Code to Specialized Hardware Accelerators
Pablo Antonio Martínez,
Jackson Woodruff,
Jordi Armengol-Estapé,
Gregorio Bernabé,
José Manuel García, and
Michael F. P. O’Boyle
(University of Murcia, Murcia, Spain; University of Edinburgh, Edinburgh, UK)
@InProceedings{CC23p99,
author = {Pablo Antonio Martínez and Jackson Woodruff and Jordi Armengol-Estapé and Gregorio Bernabé and José Manuel García and Michael F. P. O’Boyle},
title = {Matching Linear Algebra and Tensor Code to Specialized Hardware Accelerators},
booktitle = {Proc.\ CC},
publisher = {ACM},
pages = {99-98},
doi = {10.1145/3578360.3580262},
year = {2023},
}
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Torchy: A Tracing JIT Compiler for PyTorch
Nuno P. Lopes
(INESC-ID, Lisbon, Portugal; Instituto Superior Técnico - University of Lisbon, Lisbon, Portugal)
@InProceedings{CC23p113,
author = {Nuno P. Lopes},
title = {Torchy: A Tracing JIT Compiler for PyTorch},
booktitle = {Proc.\ CC},
publisher = {ACM},
pages = {113-112},
doi = {10.1145/3578360.3580266},
year = {2023},
}
Publisher's Version
Backend
A Symbolic Emulator for Shuffle Synthesis on the NVIDIA PTX Code
Kazuaki Matsumura,
Simon Garcia De Gonzalo, and
Antonio J. Peña
(Barcelona Supercomputing Center, Barcelona, Spain; Sandia National Laboratories, USA)
@InProceedings{CC23p127,
author = {Kazuaki Matsumura and Simon Garcia De Gonzalo and Antonio J. Peña},
title = {A Symbolic Emulator for Shuffle Synthesis on the NVIDIA PTX Code},
booktitle = {Proc.\ CC},
publisher = {ACM},
pages = {127-126},
doi = {10.1145/3578360.3580253},
year = {2023},
}
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Register Allocation for Compressed ISAs in LLVM
Andreas Fried,
Maximilian Stemmer-Grabow, and
Julian Wachter
(KIT, Karlsruhe, Germany)
@InProceedings{CC23p141,
author = {Andreas Fried and Maximilian Stemmer-Grabow and Julian Wachter},
title = {Register Allocation for Compressed ISAs in LLVM},
booktitle = {Proc.\ CC},
publisher = {ACM},
pages = {141-140},
doi = {10.1145/3578360.3580261},
year = {2023},
}
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RL4ReAl: Reinforcement Learning for Register Allocation
S. VenkataKeerthy,
Siddharth Jain,
Anilava Kundu,
Rohit Aggarwal,
Albert Cohen, and
Ramakrishna Upadrasta
(IIT Hyderabad, Hyderabad, India; Google, France)
@InProceedings{CC23p155,
author = {S. VenkataKeerthy and Siddharth Jain and Anilava Kundu and Rohit Aggarwal and Albert Cohen and Ramakrishna Upadrasta},
title = {RL4ReAl: Reinforcement Learning for Register Allocation},
booktitle = {Proc.\ CC},
publisher = {ACM},
pages = {155-154},
doi = {10.1145/3578360.3580273},
year = {2023},
}
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Code Size and Bugs
HyBF: A Hybrid Branch Fusion Strategy for Code Size Reduction
Rodrigo C. O. Rocha,
Charitha Saumya,
Kirshanthan Sundararajah,
Pavlos Petoumenos,
Milind Kulkarni, and
Michael F. P. O’Boyle
(University of Edinburgh, Edinburgh, UK; Purdue University, USA; University of Manchester, Manchester, UK)
@InProceedings{CC23p183,
author = {Rodrigo C. O. Rocha and Charitha Saumya and Kirshanthan Sundararajah and Pavlos Petoumenos and Milind Kulkarni and Michael F. P. O’Boyle},
title = {HyBF: A Hybrid Branch Fusion Strategy for Code Size Reduction},
booktitle = {Proc.\ CC},
publisher = {ACM},
pages = {183-182},
doi = {10.1145/3578360.3580267},
year = {2023},
}
Publisher's Version
Published Artifact
Archive submitted (520 kB)
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Linker Code Size Optimization for Native Mobile Applications
Gai Liu,
Umar Farooq,
Chengyan Zhao,
Xia Liu, and
Nian Sun
(ByteDance, USA; ByteDance, China)
@InProceedings{CC23p197,
author = {Gai Liu and Umar Farooq and Chengyan Zhao and Xia Liu and Nian Sun},
title = {Linker Code Size Optimization for Native Mobile Applications},
booktitle = {Proc.\ CC},
publisher = {ACM},
pages = {197-196},
doi = {10.1145/3578360.3580256},
year = {2023},
}
Publisher's Version
Domain Specific Languages
Building a Compiled Query Engine in Python
Hesam Shahrokhi and
Amir Shaikhha
(University of Edinburgh, Edinburgh, UK)
@InProceedings{CC23p211,
author = {Hesam Shahrokhi and Amir Shaikhha},
title = {Building a Compiled Query Engine in Python},
booktitle = {Proc.\ CC},
publisher = {ACM},
pages = {211-210},
doi = {10.1145/3578360.3580264},
year = {2023},
}
Publisher's Version
Codon: A Compiler for High-Performance Pythonic Applications and DSLs
Ariya Shajii,
Gabriel Ramirez,
Haris Smajlović,
Jessica Ray,
Bonnie Berger,
Saman Amarasinghe, and
Ibrahim Numanagić
(Exaloop, USA; Massachusetts Institute of Technology, USA; University of Victoria, Canada)
@InProceedings{CC23p225,
author = {Ariya Shajii and Gabriel Ramirez and Haris Smajlović and Jessica Ray and Bonnie Berger and Saman Amarasinghe and Ibrahim Numanagić},
title = {Codon: A Compiler for High-Performance Pythonic Applications and DSLs},
booktitle = {Proc.\ CC},
publisher = {ACM},
pages = {225-224},
doi = {10.1145/3578360.3580275},
year = {2023},
}
Publisher's Version
Archive submitted (960 kB)
MOD2IR: High-Performance Code Generation for a Biophysically Detailed Neuronal Simulation DSL
George Mitenkov,
Ioannis Magkanaris,
Omar Awile,
Pramod Kumbhar,
Felix Schürmann, and
Alastair F. Donaldson
(Imperial College London, London, UK; EPFL, Lausanne, Switzerland)
@InProceedings{CC23p239,
author = {George Mitenkov and Ioannis Magkanaris and Omar Awile and Pramod Kumbhar and Felix Schürmann and Alastair F. Donaldson},
title = {MOD2IR: High-Performance Code Generation for a Biophysically Detailed Neuronal Simulation DSL},
booktitle = {Proc.\ CC},
publisher = {ACM},
pages = {239-238},
doi = {10.1145/3578360.3580268},
year = {2023},
}
Publisher's Version
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Optimizations
A Hotspot-Driven Semi-automated Competitive Analysis Framework for Identifying Compiler Key Optimizations
Wenlong Mu,
Yilei Zhang,
Bo Huang,
Jianmei Guo, and
Shiqiang Cui
(East China Normal University, China; Hangzhou Hongjun Microelectronics Technology, China)
@InProceedings{CC23p253,
author = {Wenlong Mu and Yilei Zhang and Bo Huang and Jianmei Guo and Shiqiang Cui},
title = {A Hotspot-Driven Semi-automated Competitive Analysis Framework for Identifying Compiler Key Optimizations},
booktitle = {Proc.\ CC},
publisher = {ACM},
pages = {253-252},
doi = {10.1145/3578360.3580255},
year = {2023},
}
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LAGrad: Statically Optimized Differentiable Programming in MLIR
Mai Jacob Peng and
Christophe Dubach
(McGill University, Canada; Mila, Canada)
@InProceedings{CC23p267,
author = {Mai Jacob Peng and Christophe Dubach},
title = {LAGrad: Statically Optimized Differentiable Programming in MLIR},
booktitle = {Proc.\ CC},
publisher = {ACM},
pages = {267-266},
doi = {10.1145/3578360.3580259},
year = {2023},
}
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