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31st ACM SIGPLAN International Conference on Compiler Construction (CC 2022), April 02–03, 2022,
Seoul, South Korea
Frontmatter
Keynote
Quantum Computing and Hardware Design
QSSA: An SSA-Based IR for Quantum Computing
Anurudh Peduri,
Siddharth Bhat, and
Tobias Grosser
(IIIT Hyderabad, India; University of Edinburgh, UK)
@InProceedings{CC22p18,
author = {Anurudh Peduri and Siddharth Bhat and Tobias Grosser},
title = {QSSA: An SSA-Based IR for Quantum Computing},
booktitle = {Proc.\ CC},
publisher = {ACM},
pages = {18-17},
doi = {10.1145/3497776.3517772},
year = {2022},
}
Publisher's Version
Published Artifact
Artifacts Available
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Results Reproduced
QRANE: Lifting QASM Programs to an Affine IR
Blake Gerard,
Tobias Grosser, and
Martin Kong
(University of Oklahoma, USA; University of Edinburgh, UK)
@InProceedings{CC22p35,
author = {Blake Gerard and Tobias Grosser and Martin Kong},
title = {QRANE: Lifting QASM Programs to an Affine IR},
booktitle = {Proc.\ CC},
publisher = {ACM},
pages = {35-34},
doi = {10.1145/3497776.3517775},
year = {2022},
}
Publisher's Version
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A Polynomial Time Exact Solution to the Bit-Aware Register Binding Problem
Michael Canesche,
Ricardo Ferreira,
José Augusto Nacif, and
Fernando Magno Quintão Pereira
(Federal University of Minas Gerais, Brazil; Federal University of Viçosa, Brazil)
@InProceedings{CC22p52,
author = {Michael Canesche and Ricardo Ferreira and José Augusto Nacif and Fernando Magno Quintão Pereira},
title = {A Polynomial Time Exact Solution to the Bit-Aware Register Binding Problem},
booktitle = {Proc.\ CC},
publisher = {ACM},
pages = {52-51},
doi = {10.1145/3497776.3517773},
year = {2022},
}
Publisher's Version
Compiler Theory
Graph Transformations for Register-Pressure-Aware Instruction Scheduling
Ghassan Shobaki,
Justin Bassett,
Mark Heffernan, and
Austin Kerbow
(California State University at Sacramento, USA; Google, USA)
@InProceedings{CC22p69,
author = {Ghassan Shobaki and Justin Bassett and Mark Heffernan and Austin Kerbow},
title = {Graph Transformations for Register-Pressure-Aware Instruction Scheduling},
booktitle = {Proc.\ CC},
publisher = {ACM},
pages = {69-68},
doi = {10.1145/3497776.3517771},
year = {2022},
}
Publisher's Version
Caviar: An E-Graph Based TRS for Automatic Code Optimization
Smail Kourta,
Adel Abderahmane Namani,
Fatima Benbouzid-Si Tayeb,
Kim Hazelwood,
Chris Cummins,
Hugh Leather, and
Riyadh Baghdadi
(NYU Abu Dhabi, United Arab Emirates; École nationale supérieure d'informatique, Algeria; Meta AI, USA)
@InProceedings{CC22p86,
author = {Smail Kourta and Adel Abderahmane Namani and Fatima Benbouzid-Si Tayeb and Kim Hazelwood and Chris Cummins and Hugh Leather and Riyadh Baghdadi},
title = {Caviar: An E-Graph Based TRS for Automatic Code Optimization},
booktitle = {Proc.\ CC},
publisher = {ACM},
pages = {86-85},
doi = {10.1145/3497776.3517781},
year = {2022},
}
Publisher's Version
Seamless Deductive Inference via Macros
Arash Sahebolamri,
Thomas Gilray, and
Kristopher Micinski
(Syracuse University, USA; University of Alabama at Birmingham, USA)
@InProceedings{CC22p120,
author = {Arash Sahebolamri and Thomas Gilray and Kristopher Micinski},
title = {Seamless Deductive Inference via Macros},
booktitle = {Proc.\ CC},
publisher = {ACM},
pages = {120-119},
doi = {10.1145/3497776.3517779},
year = {2022},
}
Publisher's Version
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Results Reproduced
Compilers and Machine Learning
One-Shot Tuner for Deep Learning Compilers
Jaehun Ryu,
Eunhyeok Park, and
Hyojin Sung
(POSTECH, South Korea)
@InProceedings{CC22p137,
author = {Jaehun Ryu and Eunhyeok Park and Hyojin Sung},
title = {One-Shot Tuner for Deep Learning Compilers},
booktitle = {Proc.\ CC},
publisher = {ACM},
pages = {137-136},
doi = {10.1145/3497776.3517774},
year = {2022},
}
Publisher's Version
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Training of Deep Learning Pipelines on Memory-Constrained GPUs via Segmented Fused-Tiled Execution
Yufan Xu,
Saurabh Raje,
Atanas Rountev,
Gerald Sabin,
Aravind Sukumaran-Rajam, and
P. Sadayappan
(University of Utah, USA; Ohio State University, USA; RNET Technologies, USA; Washington State University, USA)
@InProceedings{CC22p154,
author = {Yufan Xu and Saurabh Raje and Atanas Rountev and Gerald Sabin and Aravind Sukumaran-Rajam and P. Sadayappan},
title = {Training of Deep Learning Pipelines on Memory-Constrained GPUs via Segmented Fused-Tiled Execution},
booktitle = {Proc.\ CC},
publisher = {ACM},
pages = {154-153},
doi = {10.1145/3497776.3517766},
year = {2022},
}
Publisher's Version
Published Artifact
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Results Reproduced
MLIR-Based Code Generation for GPU Tensor Cores
Navdeep Katel,
Vivek Khandelwal, and
Uday Bondhugula
(Indian Institute of Science, India; PolyMage Labs, India)
@InProceedings{CC22p171,
author = {Navdeep Katel and Vivek Khandelwal and Uday Bondhugula},
title = {MLIR-Based Code Generation for GPU Tensor Cores},
booktitle = {Proc.\ CC},
publisher = {ACM},
pages = {171-170},
doi = {10.1145/3497776.3517770},
year = {2022},
}
Publisher's Version
Automating Reinforcement Learning Architecture Design for Code Optimization
Huanting Wang,
Zhanyong Tang,
Cheng Zhang,
Jiaqi Zhao,
Chris Cummins,
Hugh Leather, and
Zheng Wang
(NorthWest University, China; University of Leeds, UK; Meta AI, USA)
@InProceedings{CC22p188,
author = {Huanting Wang and Zhanyong Tang and Cheng Zhang and Jiaqi Zhao and Chris Cummins and Hugh Leather and Zheng Wang},
title = {Automating Reinforcement Learning Architecture Design for Code Optimization},
booktitle = {Proc.\ CC},
publisher = {ACM},
pages = {188-187},
doi = {10.1145/3497776.3517769},
year = {2022},
}
Publisher's Version
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Results Reproduced
Parallelism
Memory Access Scheduling to Reduce Thread Migrations
Sana Damani,
Prithayan Barua, and
Vivek Sarkar
(Georgia Institute of Technology, USA)
@InProceedings{CC22p205,
author = {Sana Damani and Prithayan Barua and Vivek Sarkar},
title = {Memory Access Scheduling to Reduce Thread Migrations},
booktitle = {Proc.\ CC},
publisher = {ACM},
pages = {205-204},
doi = {10.1145/3497776.3517768},
year = {2022},
}
Publisher's Version
Performant Portable OpenMP
Guray Ozen and
Michael Wolfe
(NVIDIA, Germany; NVIDIA, USA)
@InProceedings{CC22p222,
author = {Guray Ozen and Michael Wolfe},
title = {Performant Portable OpenMP},
booktitle = {Proc.\ CC},
publisher = {ACM},
pages = {222-221},
doi = {10.1145/3497776.3517780},
year = {2022},
}
Publisher's Version
Safety and Correctness
BinPointer: Towards Precise, Sound, and Scalable Binary-Level Pointer Analysis
Sun Hyoung Kim,
Dongrui Zeng,
Cong Sun, and
Gang Tan
(Pennsylvania State University, USA; Xidian University, China)
@InProceedings{CC22p239,
author = {Sun Hyoung Kim and Dongrui Zeng and Cong Sun and Gang Tan},
title = {BinPointer: Towards Precise, Sound, and Scalable Binary-Level Pointer Analysis},
booktitle = {Proc.\ CC},
publisher = {ACM},
pages = {239-238},
doi = {10.1145/3497776.3517776},
year = {2022},
}
Publisher's Version
Cape: Compiler-Aided Program Transformation for HTM-Based Cache Side-Channel Defense
Rui Zhang,
Michael D. Bond, and
Yinqian Zhang
(Ohio State University, USA; Southern University of Science and Technology, China)
@InProceedings{CC22p256,
author = {Rui Zhang and Michael D. Bond and Yinqian Zhang},
title = {Cape: Compiler-Aided Program Transformation for HTM-Based Cache Side-Channel Defense},
booktitle = {Proc.\ CC},
publisher = {ACM},
pages = {256-255},
doi = {10.1145/3497776.3517778},
year = {2022},
}
Publisher's Version
Making No-Fuss Compiler Fuzzing Effective
Alex Groce,
Rijnard van Tonder,
Goutamkumar Tulajappa Kalburgi, and
Claire Le Goues
(Northern Arizona University, USA; Sourcegraph, USA; Carnegie Mellon University, USA)
@InProceedings{CC22p273,
author = {Alex Groce and Rijnard van Tonder and Goutamkumar Tulajappa Kalburgi and Claire Le Goues},
title = {Making No-Fuss Compiler Fuzzing Effective},
booktitle = {Proc.\ CC},
publisher = {ACM},
pages = {273-272},
doi = {10.1145/3497776.3517765},
year = {2022},
}
Publisher's Version
Published Artifact
Artifacts Available
Artifacts Functional
Performance Optimizations
Loner: Utilizing the CPU Vector Datapath to Process Scalar Integer Data
Armand Behroozi,
Sunghyun Park, and
Scott Mahlke
(University of Michigan, USA; NVIDIA Research, USA)
@InProceedings{CC22p290,
author = {Armand Behroozi and Sunghyun Park and Scott Mahlke},
title = {Loner: Utilizing the CPU Vector Datapath to Process Scalar Integer Data},
booktitle = {Proc.\ CC},
publisher = {ACM},
pages = {290-289},
doi = {10.1145/3497776.3517767},
year = {2022},
}
Publisher's Version
Mapping Parallelism in a Functional IR through Constraint Satisfaction: A Case Study on Convolution for Mobile GPUs
Naums Mogers,
Lu Li,
Valentin Radu, and
Christophe Dubach
(University of Edinburgh, UK; University of Sheffield, UK; McGill University, Canada)
@InProceedings{CC22p307,
author = {Naums Mogers and Lu Li and Valentin Radu and Christophe Dubach},
title = {Mapping Parallelism in a Functional IR through Constraint Satisfaction: A Case Study on Convolution for Mobile GPUs},
booktitle = {Proc.\ CC},
publisher = {ACM},
pages = {307-306},
doi = {10.1145/3497776.3517777},
year = {2022},
}
Publisher's Version
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Results Reproduced
Software Pre-execution for Irregular Memory Accesses in the HBM Era
Sanyam Mehta,
Gary Elsesser, and
Terry Greyzck
(HPE, USA)
@InProceedings{CC22p324,
author = {Sanyam Mehta and Gary Elsesser and Terry Greyzck},
title = {Software Pre-execution for Irregular Memory Accesses in the HBM Era},
booktitle = {Proc.\ CC},
publisher = {ACM},
pages = {324-323},
doi = {10.1145/3497776.3517783},
year = {2022},
}
Publisher's Version
Efficient Profile-Guided Size Optimization for Native Mobile Applications
Kyungwoo Lee,
Ellis Hoag, and
Nikolai Tillmann
(Meta, USA)
@InProceedings{CC22p341,
author = {Kyungwoo Lee and Ellis Hoag and Nikolai Tillmann},
title = {Efficient Profile-Guided Size Optimization for Native Mobile Applications},
booktitle = {Proc.\ CC},
publisher = {ACM},
pages = {341-340},
doi = {10.1145/3497776.3517764},
year = {2022},
}
Publisher's Version
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