ISMM 2018
2018 ACM SIGPLAN International Symposium on Memory Management (ISMM 2018)
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2018 ACM SIGPLAN International Symposium on Memory Management (ISMM 2018), June 18, 2018, Philadelphia, PA, USA

ISMM 2018 – Proceedings

Contents - Abstracts - Authors


Title Page
Message from the Chairs

Reference Counting and Techniques for C-Family Languages

Detailed Heap Profiling
Stuart Byma and James R. Larus
(EPFL, Switzerland)
Publisher's Version
FRC: A High-Performance Concurrent Parallel Deferred Reference Counter for C++
Charles Tripp, David Hyde, and Benjamin Grossman-Ponemon
(Terrain Data, USA; Stanford University, USA)
Publisher's Version Info
Distributed Garbage Collection for General Graphs
Steven R. Brandt, Hari Krishnan, Costas Busch, and Gokarna Sharma
(Louisiana State University, USA; Kent State University, USA)
Publisher's Version Info

Optimizing for the Web and the Cloud

Hardware-Software Co-optimization of Memory Management in Dynamic Languages
Mohamed Ismail and G. Edward Suh ORCID logo
(Cornell University, USA)
Publisher's Version
Dynamic Vertical Memory Scalability for OpenJDK Cloud Applications
Rodrigo BrunoORCID logo, Paulo Ferreira, Ruslan Synytsky, Tetiana Fydorenchyk, Jia Rao, Hang Huang, and Song Wu ORCID logo
(INESC-ID, Portugal; University of Lisbon, Portugal; Jelastic, USA; University of Texas at Arlington, USA; Huazhong University of Science and Technology, China)
Publisher's Version
OMR: Out-of-Core MapReduce for Large Data Sets
Gurneet Kaur ORCID logo, Keval Vora, Sai Charan Koduru, and Rajiv Gupta ORCID logo
(University of California at Riverside, USA; Simon Fraser University, Canada)
Publisher's Version

Analyzing the Cache and Scheduling

mPart: Miss-Ratio Curve Guided Partitioning in Key-Value Stores
Daniel Byrne, Nilufer Onder, and Zhenlin Wang
(Michigan Technological University, USA)
Publisher's Version
Prediction and Bounds on Shared Cache Demand from Memory Access Interleaving
Jacob Brock, Chen DingORCID logo, Rahman Lavaee, Fangzhou Liu, and Liang Yuan
(University of Rochester, USA; Institute of Computing Technology at Chinese Academy of Sciences, China)
Publisher's Version
Balanced Double Queues for GC Work-Stealing on Weak Memory Models
Michihiro Horie, Hiroshi Horii, Kazunori Ogata, and Tamiya Onodera
(IBM Research, Japan)
Publisher's Version

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