CGO 2022
2022 IEEE/ACM International Symposium on Code Generation and Optimization (CGO)
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2022 IEEE/ACM International Symposium on Code Generation and Optimization (CGO), February 12–16, 2022, Seoul, South Korea

CGO 2022 – Preliminary Table of Contents

Contents - Abstracts - Authors

Frontmatter

Title Page


Message from the Chairs


Committees


Sponsors


Papers

A Compiler Framework for Optimizing Dynamic Parallelism on GPUs
Mhd Ghaith Olabi, Juan Gómez Luna, Onur Mutlu, Wen-mei Hwu, and Izzat El Hajj
(American University of Beirut, Lebanon; ETH Zurich, Switzerland; University of Illinois at Urbana-Champaign, USA; NVIDIA, n.n.)


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Aggregate Update Problem for Multi-clocked Dataflow Languages
Hannes Kallwies, Martin Leucker, Daniel Thoma, Torben Scheffel, and Malte Schmitz
(University of Lübeck, Germany)


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SRTuner: Effective Compiler Optimization Customization by Exposing Synergistic Relations
Sunghyun Park, Seyyed Salar Latifi Oskouei, Yongjun Park, Armand Behroozi, Byungsoo Jeon, and Scott Mahlke
(University of Michigan, USA; University of Michigan at Ann Arbor, USA; Hanyang University, South Korea; Carnegie Mellon University, USA; Nvidia Research, USA)


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CompilerGym: Robust, Performant Compiler Optimization Environments for AI Research
Chris Cummins, Bram Wasti, Jiadong Guo, Brandon Cui, Jason Ansel, Sahir Gomez, Somya Jain, Jia Liu, Olivier Teytaud, Benoit Steiner, Yuandong Tian, and Hugh Leather ORCID logo
(Facebook, USA; Facebook, n.n.)


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PALMED: Throughput Characterization for Superscalar Architectures
Nicolas Derumigny, Théophile Bastian, Fabian Gruber, Christophe Guillon, Guillaume Iooss, Louis-Noël Pouchet, and Fabrice Rastello
(Inria, France; Grenoble Alps University, France; STMicroelectronics, France; Colorado State University, USA)


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Lambda the Ultimate SSA!
Siddharth Bhat and Tobias Grosser
(IIIT Hyderabad, India; University of Edinburgh, UK)


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Loop Rolling for Code Size Reduction
Rodrigo C. O. Rocha, Pavlos Petoumenos ORCID logo, Björn Franke, Pramod Bhatotia, and Michael O'Boyle ORCID logo
(University of Edinburgh, UK; University of Manchester, UK; TU Munich, Germany)


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SPNC: An Open-Source MLIR-Based Compiler for Fast Sum-Product Network Inference on CPUs and GPUs
Lukas SommerORCID logo, Cristian Axenie, and Andreas Koch ORCID logo
(TU Darmstadt, Germany; Huawei Research, Germany)
Sum-Product Networks (SPNs) are an alternative to the widely used Neural Networks (NNs) for machine learning. SPNs can not only reason about (un)certainty by qualifying their output with a probability, they also allow fast (tractable) inference by having run-times that are just linear w.r.t. the network size.
We present SPNC, the first tool flow for generating fast native code for SPN inference on both CPUs and GPUs, including the use of vectorized/SIMD execution. To this end, we add two SPN-specific dialects to the MLIR framework and discuss their lowering towards the execution targets.
We evaluate our approach on two applications, for which we consider performance, scaling to very large SPNs, and compile vs execution-time trade-offs. In this manner, we achieve multiple orders of magnitude in speed-ups over existing SPN support libraries.

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Sound, Precise, and Fast Abstract Interpretation with Tristate Numbers
Harishankar Vishwanathan, Matan Shachnai, Srinivas Narayana, and Santosh NagarakatteORCID logo
(Rutgers University, USA)


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A Compiler for Sound Floating-Point Computations using Affine Arithmetic
Joao Rivera, Franz Franchetti, and Markus Püschel
(ETH Zurich, Switzerland; Carnegie Mellon University, USA)


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Efficient Execution of OpenMP on GPUs
Joseph Huber, Melanie Cornelius, Giorgis Georgakoudis, Shilei Tian, Jose Monslave Diaz, Kuter Dinel, Barbara Chapman, and Johannes Doerfert
(Oak Ridge National Laboratory, USA; Illinois Institute of Technology, USA; Lawrence Livermore National Laboratory, USA; Stony Brook University, USA; Argonne National Laboratory, USA; Düzce University, n.n.)


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M3V: Multi-modal Multi-view Context Embedding for Repair Operator Prediction
Xuezheng Xu, Xudong Wang, and Jingling Xue
(UNSW, Australia)


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Recovering Container Class Types in Binaries
Xudong Wang, Xuezheng Xu, Qingan Li, Jingling Xue, and YUAN Mengting
(UNSW, Australia; Wuhan University, China)


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Automatic Horizontal Fusion for GPU Kernels
Ao Li, Bojian Zheng, Gennady Pekhimenko, and Fan Long
(Carnegie Mellon University, USA; University of Toronto, Canada; Vector Institute, Canada)


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Improving Debug Headers using BlackBox Equivalence Checking
Vaibhav Kiran Kurhe, Pratik Karia, XXX Shubhani, Abhishek Rose, and Sorav Bansal
(IIT Delhi, India)


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HECATE: Performance-Aware Scale Optimization for Homomorphic Encryption Compiler
Yongwoo Lee, Seonyeong Heo, Seonyoung Cheon, Shinnung Jeong, Changsu Kim, Eunkyung Kim, Dongyoon Lee, and Hanjun Kim
(Yonsei University, South Korea; ETH Zurich, Switzerland; Seoul National University, South Korea; Samsung SDS, n.n.; Stony Brook University, USA)


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Solving PBQP-Based Register Allocation using Deep Reinforcement Learning
Minsu Kim, Jeong-Keun Park, and Soo-Mook Moon
(Seoul National University, South Korea)


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DARM: Control-Flow Melding for SIMT Thread Divergence Reduction
Charitha Saumya, Kirshanthan Sundararajah, and Milind KulkarniORCID logo
(Purdue University, USA)


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NOELLE Offers Empowering LLVM Extensions
Angelo Matni, Enrico Armenio Deiana, Yian Su, Lukas Gross, Souradip Ghosh, Sotiris Apostolakis, Ziyang Xu, Zujun Tan, Ishita Chaturvedi, Brian Homerding, Tommy McMichen, David I. August, and Simone Campanoni
(Northwestern University, USA; Princeton University, USA)


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Cognac: Domain-Specific Compilation for Cognitive Models
Jan Vesely, Raghavendra Pradyumna Pothukuchi, Ketaki Joshi, Samyak Gupta, Jonathan D. Cohen, and Abhishek Bhattacharjee
(Yale University, USA; Princeton University, USA)


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GraphIt to CUDA Compiler in 2021 LOC: A Case for High-Performance DSL Implementation via Staging with BuilDSL
Ajay BrahmakshatriyaORCID logo and Saman Amarasinghe
(Massachusetts Institute of Technology, USA)


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Enabling Near Real-Time NLU-Driven Natural Language Programming through Dynamic Grammar Graph-Based Translation
Zifan Nan, Xipeng ShenORCID logo, and Hui Guan
(North Carolina State University, USA; University of Massachusetts at Amherst, USA)


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Optimizing GPU Deep Learning Operators with Polyhedral Scheduling Constraint Injection
Cédric Bastoul, Zhen Zhang, Harenome Razanajato, Javier de Juan, Nelson Lossing, Adilla Susungi, Etienne Filhol, and Baptiste Jarry
(Huawei, France; Huawei Research, France; Huawei, n.n.)


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F3M: Fast Focused Function Merging
Sean Stirling, Rodrigo C. O. Rocha, Hugh Leather ORCID logo, Kim Hazelwood, Michael O'Boyle ORCID logo, and Pavlos Petoumenos ORCID logo
(Codeplay, UK; University of Edinburgh, UK; Facebook, UK; University of Manchester, UK)


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Unified Compilation for Lossless Compression and Sparse Computing
Daniel Donenfeld, Stephen Chou, and Saman Amarasinghe
(Massachusetts Institute of Technology, USA)


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Comprehensive Accelerator-Dataflow Co-design Optimization for Convolutional Neural Networks
Miheer Vaidya, Aravind Sukumaran-Rajam ORCID logo, Atanas Rountev, and Ponnuswamy Sadayappan
(University of Utah, USA; Washington State University, USA; Ohio State University, USA)


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Gadgets Splicing: Dynamic Binary Transformation for Precise Rewriting
Linan Tian, Yangyang Shi, Liwei Chen, Yanqi Yang, and Gang Shi
(University of Chinese Academy of Sciences, China; Institute of Information Engineering at Chinese Academy of Sciences, China)


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