LCTES 2017 – Author Index

C D F H J K L M N P R S T W X Y Z

	Chen, Xianzhang	LCTES '17: "Optimal Functional Unit Assignment ..." Optimal Functional Unit Assignment and Voltage Selection for Pipelined MPSoC with Guaranteed Probability on Time Performance Weiwen Jiang, Edwin H.-M. Sha, Qingfeng Zhuge, Hailiang Dong, and Xianzhang Chen (Chongqing University, China) @InProceedings{LCTES17p41, author = {Weiwen Jiang and Edwin H.-M. Sha and Qingfeng Zhuge and Hailiang Dong and Xianzhang Chen}, title = {Optimal Functional Unit Assignment and Voltage Selection for Pipelined MPSoC with Guaranteed Probability on Time Performance}, booktitle = {Proc.\ LCTES}, publisher = {ACM}, pages = {41-40}, doi = {}, year = {2017}, } Article: lctes17main-main40-p (type: Full Paper (10 pages)) doi:
	Chen, Yiran	LCTES '17: "A Lightweight Progress Maximization ..." A Lightweight Progress Maximization Scheduler for Non-volatile Processor under Unstable Energy Harvesting Chen Pan, Mimi Xie, Yongpan Liu, Yanzhi Wang, Chun Jason Xue, Yuangang Wang, Yiran Chen, and Jingtong Hu (Oklahoma State University, USA; Tsinghua University, China; Syracuse University, USA; City University of Hong Kong, China; Huawei Technologies, China; Duke University, USA) @InProceedings{LCTES17p101, author = {Chen Pan and Mimi Xie and Yongpan Liu and Yanzhi Wang and Chun Jason Xue and Yuangang Wang and Yiran Chen and Jingtong Hu}, title = {A Lightweight Progress Maximization Scheduler for Non-volatile Processor under Unstable Energy Harvesting}, booktitle = {Proc.\ LCTES}, publisher = {ACM}, pages = {101-100}, doi = {}, year = {2017}, } Article: lctes17main-main9-p (type: Full Paper (10 pages)) doi:
	Dietrich, Christian	LCTES '17: "OSEK-V: Application-Specific ..." OSEK-V: Application-Specific RTOS Instantiation in Hardware Christian Dietrich and Daniel Lohmann (Leibniz Universität Hannover, Germany) @InProceedings{LCTES17p111, author = {Christian Dietrich and Daniel Lohmann}, title = {OSEK-V: Application-Specific RTOS Instantiation in Hardware}, booktitle = {Proc.\ LCTES}, publisher = {ACM}, pages = {111-110}, doi = {}, year = {2017}, } Article: lctes17main-main19-p (type: Full Paper (10 pages)) doi:
	Ding, Xianzhong	LCTES '17: "Unified nvTCAM and sTCAM Architecture ..." Unified nvTCAM and sTCAM Architecture for Improving Packet Matching Performance Xianzhong Ding, Zhiyong Zhang, Zhiping Jia, Lei Ju, Mengying Zhao, and Huawei Huang (Shandong University, China; University of Aizu, Japan) @InProceedings{LCTES17p91, author = {Xianzhong Ding and Zhiyong Zhang and Zhiping Jia and Lei Ju and Mengying Zhao and Huawei Huang}, title = {Unified nvTCAM and sTCAM Architecture for Improving Packet Matching Performance}, booktitle = {Proc.\ LCTES}, publisher = {ACM}, pages = {91-90}, doi = {}, year = {2017}, } Article: lctes17main-main36-p (type: Full Paper (10 pages)) doi:
	Dong, Hailiang	LCTES '17: "Optimal Functional Unit Assignment ..." Optimal Functional Unit Assignment and Voltage Selection for Pipelined MPSoC with Guaranteed Probability on Time Performance Weiwen Jiang, Edwin H.-M. Sha, Qingfeng Zhuge, Hailiang Dong, and Xianzhang Chen (Chongqing University, China) @InProceedings{LCTES17p41, author = {Weiwen Jiang and Edwin H.-M. Sha and Qingfeng Zhuge and Hailiang Dong and Xianzhang Chen}, title = {Optimal Functional Unit Assignment and Voltage Selection for Pipelined MPSoC with Guaranteed Probability on Time Performance}, booktitle = {Proc.\ LCTES}, publisher = {ACM}, pages = {41-40}, doi = {}, year = {2017}, } Article: lctes17main-main40-p (type: Full Paper (10 pages)) doi:
	Fu, Sheng-Yu	LCTES '17: "Dynamic Translation of Structured ..." Dynamic Translation of Structured Loads/Stores and Register Mapping for Architectures with SIMD Extensions Sheng-Yu Fu, Ding-Yong Hong, Yu-Ping Liu, Jan-Jan Wu, and Wei-Chung Hsu (National Taiwan University, Taiwan; Academia Sinica, Taiwan) @InProceedings{LCTES17p31, author = {Sheng-Yu Fu and Ding-Yong Hong and Yu-Ping Liu and Jan-Jan Wu and Wei-Chung Hsu}, title = {Dynamic Translation of Structured Loads/Stores and Register Mapping for Architectures with SIMD Extensions}, booktitle = {Proc.\ LCTES}, publisher = {ACM}, pages = {31-30}, doi = {}, year = {2017}, } Article: lctes17main-main13-p (type: Full Paper (10 pages)) doi:
	Hannig, Frank	LCTES '17: "Auto-vectorization for Image ..." Auto-vectorization for Image Processing DSLs Oliver Reiche, Christof Kobylko, Frank Hannig, and Jürgen Teich (University of Erlangen-Nuremberg, Germany) @InProceedings{LCTES17p21, author = {Oliver Reiche and Christof Kobylko and Frank Hannig and Jürgen Teich}, title = {Auto-vectorization for Image Processing DSLs}, booktitle = {Proc.\ LCTES}, publisher = {ACM}, pages = {21-20}, doi = {}, year = {2017}, } Article: lctes17main-main20-p (type: Full Paper (10 pages)) doi:
	Heo, Seonyeong	LCTES '17: "Integrated IoT Programming ..." Integrated IoT Programming with Selective Abstraction Gyeongmin Lee, Seonyeong Heo, Bongjun Kim, Jong Kim, and Hanjun Kim (POSTECH, South Korea) @InProceedings{LCTES17p51, author = {Gyeongmin Lee and Seonyeong Heo and Bongjun Kim and Jong Kim and Hanjun Kim}, title = {Integrated IoT Programming with Selective Abstraction}, booktitle = {Proc.\ LCTES}, publisher = {ACM}, pages = {51-50}, doi = {}, year = {2017}, } Article: lctes17main-main21-p (type: Full Paper (10 pages)) doi:
	Hong, Ding-Yong	LCTES '17: "Dynamic Translation of Structured ..." Dynamic Translation of Structured Loads/Stores and Register Mapping for Architectures with SIMD Extensions Sheng-Yu Fu, Ding-Yong Hong, Yu-Ping Liu, Jan-Jan Wu, and Wei-Chung Hsu (National Taiwan University, Taiwan; Academia Sinica, Taiwan) @InProceedings{LCTES17p31, author = {Sheng-Yu Fu and Ding-Yong Hong and Yu-Ping Liu and Jan-Jan Wu and Wei-Chung Hsu}, title = {Dynamic Translation of Structured Loads/Stores and Register Mapping for Architectures with SIMD Extensions}, booktitle = {Proc.\ LCTES}, publisher = {ACM}, pages = {31-30}, doi = {}, year = {2017}, } Article: lctes17main-main13-p (type: Full Paper (10 pages)) doi:
	Hsu, Wei-Chung	LCTES '17: "Dynamic Translation of Structured ..." Dynamic Translation of Structured Loads/Stores and Register Mapping for Architectures with SIMD Extensions Sheng-Yu Fu, Ding-Yong Hong, Yu-Ping Liu, Jan-Jan Wu, and Wei-Chung Hsu (National Taiwan University, Taiwan; Academia Sinica, Taiwan) @InProceedings{LCTES17p31, author = {Sheng-Yu Fu and Ding-Yong Hong and Yu-Ping Liu and Jan-Jan Wu and Wei-Chung Hsu}, title = {Dynamic Translation of Structured Loads/Stores and Register Mapping for Architectures with SIMD Extensions}, booktitle = {Proc.\ LCTES}, publisher = {ACM}, pages = {31-30}, doi = {}, year = {2017}, } Article: lctes17main-main13-p (type: Full Paper (10 pages)) doi:
	Hu, Jingtong	LCTES '17: "A Lightweight Progress Maximization ..." A Lightweight Progress Maximization Scheduler for Non-volatile Processor under Unstable Energy Harvesting Chen Pan, Mimi Xie, Yongpan Liu, Yanzhi Wang, Chun Jason Xue, Yuangang Wang, Yiran Chen, and Jingtong Hu (Oklahoma State University, USA; Tsinghua University, China; Syracuse University, USA; City University of Hong Kong, China; Huawei Technologies, China; Duke University, USA) @InProceedings{LCTES17p101, author = {Chen Pan and Mimi Xie and Yongpan Liu and Yanzhi Wang and Chun Jason Xue and Yuangang Wang and Yiran Chen and Jingtong Hu}, title = {A Lightweight Progress Maximization Scheduler for Non-volatile Processor under Unstable Energy Harvesting}, booktitle = {Proc.\ LCTES}, publisher = {ACM}, pages = {101-100}, doi = {}, year = {2017}, } Article: lctes17main-main9-p (type: Full Paper (10 pages)) doi:
	Huang, Huawei	LCTES '17: "Unified nvTCAM and sTCAM Architecture ..." Unified nvTCAM and sTCAM Architecture for Improving Packet Matching Performance Xianzhong Ding, Zhiyong Zhang, Zhiping Jia, Lei Ju, Mengying Zhao, and Huawei Huang (Shandong University, China; University of Aizu, Japan) @InProceedings{LCTES17p91, author = {Xianzhong Ding and Zhiyong Zhang and Zhiping Jia and Lei Ju and Mengying Zhao and Huawei Huang}, title = {Unified nvTCAM and sTCAM Architecture for Improving Packet Matching Performance}, booktitle = {Proc.\ LCTES}, publisher = {ACM}, pages = {91-90}, doi = {}, year = {2017}, } Article: lctes17main-main36-p (type: Full Paper (10 pages)) doi:
	Jantz, Michael R.	LCTES '17: "AOT vs. JIT: Impact of Profile ..." AOT vs. JIT: Impact of Profile Data on Code Quality April W. Wade, Prasad A. Kulkarni, and Michael R. Jantz (University of Kansas, USA; University of Tennessee, USA) @InProceedings{LCTES17p1, author = {April W. Wade and Prasad A. Kulkarni and Michael R. Jantz}, title = {AOT vs. JIT: Impact of Profile Data on Code Quality}, booktitle = {Proc.\ LCTES}, publisher = {ACM}, pages = {1-0}, doi = {}, year = {2017}, } Article: lctes17main-main58-p (type: Full Paper (10 pages)) doi:
	Jia, Zhiping	LCTES '17: "Unified nvTCAM and sTCAM Architecture ..." Unified nvTCAM and sTCAM Architecture for Improving Packet Matching Performance Xianzhong Ding, Zhiyong Zhang, Zhiping Jia, Lei Ju, Mengying Zhao, and Huawei Huang (Shandong University, China; University of Aizu, Japan) @InProceedings{LCTES17p91, author = {Xianzhong Ding and Zhiyong Zhang and Zhiping Jia and Lei Ju and Mengying Zhao and Huawei Huang}, title = {Unified nvTCAM and sTCAM Architecture for Improving Packet Matching Performance}, booktitle = {Proc.\ LCTES}, publisher = {ACM}, pages = {91-90}, doi = {}, year = {2017}, } Article: lctes17main-main36-p (type: Full Paper (10 pages)) doi:
	Jiang, Weiwen	LCTES '17: "Optimal Functional Unit Assignment ..." Optimal Functional Unit Assignment and Voltage Selection for Pipelined MPSoC with Guaranteed Probability on Time Performance Weiwen Jiang, Edwin H.-M. Sha, Qingfeng Zhuge, Hailiang Dong, and Xianzhang Chen (Chongqing University, China) @InProceedings{LCTES17p41, author = {Weiwen Jiang and Edwin H.-M. Sha and Qingfeng Zhuge and Hailiang Dong and Xianzhang Chen}, title = {Optimal Functional Unit Assignment and Voltage Selection for Pipelined MPSoC with Guaranteed Probability on Time Performance}, booktitle = {Proc.\ LCTES}, publisher = {ACM}, pages = {41-40}, doi = {}, year = {2017}, } Article: lctes17main-main40-p (type: Full Paper (10 pages)) doi:
	Ju, Lei	LCTES '17: "Unified nvTCAM and sTCAM Architecture ..." Unified nvTCAM and sTCAM Architecture for Improving Packet Matching Performance Xianzhong Ding, Zhiyong Zhang, Zhiping Jia, Lei Ju, Mengying Zhao, and Huawei Huang (Shandong University, China; University of Aizu, Japan) @InProceedings{LCTES17p91, author = {Xianzhong Ding and Zhiyong Zhang and Zhiping Jia and Lei Ju and Mengying Zhao and Huawei Huang}, title = {Unified nvTCAM and sTCAM Architecture for Improving Packet Matching Performance}, booktitle = {Proc.\ LCTES}, publisher = {ACM}, pages = {91-90}, doi = {}, year = {2017}, } Article: lctes17main-main36-p (type: Full Paper (10 pages)) doi:
	Kim, Bongjun	LCTES '17: "Integrated IoT Programming ..." Integrated IoT Programming with Selective Abstraction Gyeongmin Lee, Seonyeong Heo, Bongjun Kim, Jong Kim, and Hanjun Kim (POSTECH, South Korea) @InProceedings{LCTES17p51, author = {Gyeongmin Lee and Seonyeong Heo and Bongjun Kim and Jong Kim and Hanjun Kim}, title = {Integrated IoT Programming with Selective Abstraction}, booktitle = {Proc.\ LCTES}, publisher = {ACM}, pages = {51-50}, doi = {}, year = {2017}, } Article: lctes17main-main21-p (type: Full Paper (10 pages)) doi:
	Kim, Hanjun	LCTES '17: "Integrated IoT Programming ..." Integrated IoT Programming with Selective Abstraction Gyeongmin Lee, Seonyeong Heo, Bongjun Kim, Jong Kim, and Hanjun Kim (POSTECH, South Korea) @InProceedings{LCTES17p51, author = {Gyeongmin Lee and Seonyeong Heo and Bongjun Kim and Jong Kim and Hanjun Kim}, title = {Integrated IoT Programming with Selective Abstraction}, booktitle = {Proc.\ LCTES}, publisher = {ACM}, pages = {51-50}, doi = {}, year = {2017}, } Article: lctes17main-main21-p (type: Full Paper (10 pages)) doi:
	Kim, Jong	LCTES '17: "Integrated IoT Programming ..." Integrated IoT Programming with Selective Abstraction Gyeongmin Lee, Seonyeong Heo, Bongjun Kim, Jong Kim, and Hanjun Kim (POSTECH, South Korea) @InProceedings{LCTES17p51, author = {Gyeongmin Lee and Seonyeong Heo and Bongjun Kim and Jong Kim and Hanjun Kim}, title = {Integrated IoT Programming with Selective Abstraction}, booktitle = {Proc.\ LCTES}, publisher = {ACM}, pages = {51-50}, doi = {}, year = {2017}, } Article: lctes17main-main21-p (type: Full Paper (10 pages)) doi:
	Kobylko, Christof	LCTES '17: "Auto-vectorization for Image ..." Auto-vectorization for Image Processing DSLs Oliver Reiche, Christof Kobylko, Frank Hannig, and Jürgen Teich (University of Erlangen-Nuremberg, Germany) @InProceedings{LCTES17p21, author = {Oliver Reiche and Christof Kobylko and Frank Hannig and Jürgen Teich}, title = {Auto-vectorization for Image Processing DSLs}, booktitle = {Proc.\ LCTES}, publisher = {ACM}, pages = {21-20}, doi = {}, year = {2017}, } Article: lctes17main-main20-p (type: Full Paper (10 pages)) doi:
	Kulkarni, Prasad A.	LCTES '17: "AOT vs. JIT: Impact of Profile ..." AOT vs. JIT: Impact of Profile Data on Code Quality April W. Wade, Prasad A. Kulkarni, and Michael R. Jantz (University of Kansas, USA; University of Tennessee, USA) @InProceedings{LCTES17p1, author = {April W. Wade and Prasad A. Kulkarni and Michael R. Jantz}, title = {AOT vs. JIT: Impact of Profile Data on Code Quality}, booktitle = {Proc.\ LCTES}, publisher = {ACM}, pages = {1-0}, doi = {}, year = {2017}, } Article: lctes17main-main58-p (type: Full Paper (10 pages)) doi:
	Lee, Gyeongmin	LCTES '17: "Integrated IoT Programming ..." Integrated IoT Programming with Selective Abstraction Gyeongmin Lee, Seonyeong Heo, Bongjun Kim, Jong Kim, and Hanjun Kim (POSTECH, South Korea) @InProceedings{LCTES17p51, author = {Gyeongmin Lee and Seonyeong Heo and Bongjun Kim and Jong Kim and Hanjun Kim}, title = {Integrated IoT Programming with Selective Abstraction}, booktitle = {Proc.\ LCTES}, publisher = {ACM}, pages = {51-50}, doi = {}, year = {2017}, } Article: lctes17main-main21-p (type: Full Paper (10 pages)) doi:
	Liu, Yongpan	LCTES '17: "A Lightweight Progress Maximization ..." A Lightweight Progress Maximization Scheduler for Non-volatile Processor under Unstable Energy Harvesting Chen Pan, Mimi Xie, Yongpan Liu, Yanzhi Wang, Chun Jason Xue, Yuangang Wang, Yiran Chen, and Jingtong Hu (Oklahoma State University, USA; Tsinghua University, China; Syracuse University, USA; City University of Hong Kong, China; Huawei Technologies, China; Duke University, USA) @InProceedings{LCTES17p101, author = {Chen Pan and Mimi Xie and Yongpan Liu and Yanzhi Wang and Chun Jason Xue and Yuangang Wang and Yiran Chen and Jingtong Hu}, title = {A Lightweight Progress Maximization Scheduler for Non-volatile Processor under Unstable Energy Harvesting}, booktitle = {Proc.\ LCTES}, publisher = {ACM}, pages = {101-100}, doi = {}, year = {2017}, } Article: lctes17main-main9-p (type: Full Paper (10 pages)) doi:
	Liu, Yu-Ping	LCTES '17: "Dynamic Translation of Structured ..." Dynamic Translation of Structured Loads/Stores and Register Mapping for Architectures with SIMD Extensions Sheng-Yu Fu, Ding-Yong Hong, Yu-Ping Liu, Jan-Jan Wu, and Wei-Chung Hsu (National Taiwan University, Taiwan; Academia Sinica, Taiwan) @InProceedings{LCTES17p31, author = {Sheng-Yu Fu and Ding-Yong Hong and Yu-Ping Liu and Jan-Jan Wu and Wei-Chung Hsu}, title = {Dynamic Translation of Structured Loads/Stores and Register Mapping for Architectures with SIMD Extensions}, booktitle = {Proc.\ LCTES}, publisher = {ACM}, pages = {31-30}, doi = {}, year = {2017}, } Article: lctes17main-main13-p (type: Full Paper (10 pages)) doi:
	Lohmann, Daniel	LCTES '17: "OSEK-V: Application-Specific ..." OSEK-V: Application-Specific RTOS Instantiation in Hardware Christian Dietrich and Daniel Lohmann (Leibniz Universität Hannover, Germany) @InProceedings{LCTES17p111, author = {Christian Dietrich and Daniel Lohmann}, title = {OSEK-V: Application-Specific RTOS Instantiation in Hardware}, booktitle = {Proc.\ LCTES}, publisher = {ACM}, pages = {111-110}, doi = {}, year = {2017}, } Article: lctes17main-main19-p (type: Full Paper (10 pages)) doi:
	Marco, Vicent Sanz	LCTES '17: "Adaptive Optimization for ..." Adaptive Optimization for OpenCL Programs on Embedded Heterogeneous Systems Ben Taylor, Vicent Sanz Marco, and Zheng Wang (Lancaster University, UK) @InProceedings{LCTES17p11, author = {Ben Taylor and Vicent Sanz Marco and Zheng Wang}, title = {Adaptive Optimization for OpenCL Programs on Embedded Heterogeneous Systems}, booktitle = {Proc.\ LCTES}, publisher = {ACM}, pages = {11-10}, doi = {}, year = {2017}, } NOLINKDECO Article: lctes17main-main55-p (type: Full Paper (10 pages)) doi:
	Nie, Chuanyao	LCTES '17: "Integrating Task Scheduling ..." Integrating Task Scheduling and Cache Locking for Multicore Real-Time Embedded Systems Wenguang Zheng, Hui Wu, and Chuanyao Nie (Tianjin University of Technology, China; UNSW, Australia) @InProceedings{LCTES17p71, author = {Wenguang Zheng and Hui Wu and Chuanyao Nie}, title = {Integrating Task Scheduling and Cache Locking for Multicore Real-Time Embedded Systems}, booktitle = {Proc.\ LCTES}, publisher = {ACM}, pages = {71-70}, doi = {}, year = {2017}, } Article: lctes17main-main25-p (type: Full Paper (10 pages)) doi:
	Pan, Chen	LCTES '17: "A Lightweight Progress Maximization ..." A Lightweight Progress Maximization Scheduler for Non-volatile Processor under Unstable Energy Harvesting Chen Pan, Mimi Xie, Yongpan Liu, Yanzhi Wang, Chun Jason Xue, Yuangang Wang, Yiran Chen, and Jingtong Hu (Oklahoma State University, USA; Tsinghua University, China; Syracuse University, USA; City University of Hong Kong, China; Huawei Technologies, China; Duke University, USA) @InProceedings{LCTES17p101, author = {Chen Pan and Mimi Xie and Yongpan Liu and Yanzhi Wang and Chun Jason Xue and Yuangang Wang and Yiran Chen and Jingtong Hu}, title = {A Lightweight Progress Maximization Scheduler for Non-volatile Processor under Unstable Energy Harvesting}, booktitle = {Proc.\ LCTES}, publisher = {ACM}, pages = {101-100}, doi = {}, year = {2017}, } Article: lctes17main-main9-p (type: Full Paper (10 pages)) doi:
	Reiche, Oliver	LCTES '17: "Auto-vectorization for Image ..." Auto-vectorization for Image Processing DSLs Oliver Reiche, Christof Kobylko, Frank Hannig, and Jürgen Teich (University of Erlangen-Nuremberg, Germany) @InProceedings{LCTES17p21, author = {Oliver Reiche and Christof Kobylko and Frank Hannig and Jürgen Teich}, title = {Auto-vectorization for Image Processing DSLs}, booktitle = {Proc.\ LCTES}, publisher = {ACM}, pages = {21-20}, doi = {}, year = {2017}, } Article: lctes17main-main20-p (type: Full Paper (10 pages)) doi:
	Sha, Edwin H.-M.	LCTES '17: "Optimal Functional Unit Assignment ..." Optimal Functional Unit Assignment and Voltage Selection for Pipelined MPSoC with Guaranteed Probability on Time Performance Weiwen Jiang, Edwin H.-M. Sha, Qingfeng Zhuge, Hailiang Dong, and Xianzhang Chen (Chongqing University, China) @InProceedings{LCTES17p41, author = {Weiwen Jiang and Edwin H.-M. Sha and Qingfeng Zhuge and Hailiang Dong and Xianzhang Chen}, title = {Optimal Functional Unit Assignment and Voltage Selection for Pipelined MPSoC with Guaranteed Probability on Time Performance}, booktitle = {Proc.\ LCTES}, publisher = {ACM}, pages = {41-40}, doi = {}, year = {2017}, } Article: lctes17main-main40-p (type: Full Paper (10 pages)) doi:
	Taylor, Ben	LCTES '17: "Adaptive Optimization for ..." Adaptive Optimization for OpenCL Programs on Embedded Heterogeneous Systems Ben Taylor, Vicent Sanz Marco, and Zheng Wang (Lancaster University, UK) @InProceedings{LCTES17p11, author = {Ben Taylor and Vicent Sanz Marco and Zheng Wang}, title = {Adaptive Optimization for OpenCL Programs on Embedded Heterogeneous Systems}, booktitle = {Proc.\ LCTES}, publisher = {ACM}, pages = {11-10}, doi = {}, year = {2017}, } NOLINKDECO Article: lctes17main-main55-p (type: Full Paper (10 pages)) doi:
	Teich, Jürgen	LCTES '17: "Auto-vectorization for Image ..." Auto-vectorization for Image Processing DSLs Oliver Reiche, Christof Kobylko, Frank Hannig, and Jürgen Teich (University of Erlangen-Nuremberg, Germany) @InProceedings{LCTES17p21, author = {Oliver Reiche and Christof Kobylko and Frank Hannig and Jürgen Teich}, title = {Auto-vectorization for Image Processing DSLs}, booktitle = {Proc.\ LCTES}, publisher = {ACM}, pages = {21-20}, doi = {}, year = {2017}, } Article: lctes17main-main20-p (type: Full Paper (10 pages)) doi:
	Wade, April W.	LCTES '17: "AOT vs. JIT: Impact of Profile ..." AOT vs. JIT: Impact of Profile Data on Code Quality April W. Wade, Prasad A. Kulkarni, and Michael R. Jantz (University of Kansas, USA; University of Tennessee, USA) @InProceedings{LCTES17p1, author = {April W. Wade and Prasad A. Kulkarni and Michael R. Jantz}, title = {AOT vs. JIT: Impact of Profile Data on Code Quality}, booktitle = {Proc.\ LCTES}, publisher = {ACM}, pages = {1-0}, doi = {}, year = {2017}, } Article: lctes17main-main58-p (type: Full Paper (10 pages)) doi:
	Wang, Yanzhi	LCTES '17: "A Lightweight Progress Maximization ..." A Lightweight Progress Maximization Scheduler for Non-volatile Processor under Unstable Energy Harvesting Chen Pan, Mimi Xie, Yongpan Liu, Yanzhi Wang, Chun Jason Xue, Yuangang Wang, Yiran Chen, and Jingtong Hu (Oklahoma State University, USA; Tsinghua University, China; Syracuse University, USA; City University of Hong Kong, China; Huawei Technologies, China; Duke University, USA) @InProceedings{LCTES17p101, author = {Chen Pan and Mimi Xie and Yongpan Liu and Yanzhi Wang and Chun Jason Xue and Yuangang Wang and Yiran Chen and Jingtong Hu}, title = {A Lightweight Progress Maximization Scheduler for Non-volatile Processor under Unstable Energy Harvesting}, booktitle = {Proc.\ LCTES}, publisher = {ACM}, pages = {101-100}, doi = {}, year = {2017}, } Article: lctes17main-main9-p (type: Full Paper (10 pages)) doi:
	Wang, Yi	LCTES '17: "Towards Memory-Efficient Processing-in-Memory ..." Towards Memory-Efficient Processing-in-Memory Architecture for Convolutional Neural Networks Yi Wang, Mingxu Zhang, and Jing Yang (Shenzhen University, China; Institute of Computing Technology at Chinese Academy of Sciences, China; Harbin Institute of Technology, China) @InProceedings{LCTES17p81, author = {Yi Wang and Mingxu Zhang and Jing Yang}, title = {Towards Memory-Efficient Processing-in-Memory Architecture for Convolutional Neural Networks}, booktitle = {Proc.\ LCTES}, publisher = {ACM}, pages = {81-80}, doi = {}, year = {2017}, } Article: lctes17main-main23-p (type: Full Paper (10 pages)) doi:
	Wang, Yuangang	LCTES '17: "A Lightweight Progress Maximization ..." A Lightweight Progress Maximization Scheduler for Non-volatile Processor under Unstable Energy Harvesting Chen Pan, Mimi Xie, Yongpan Liu, Yanzhi Wang, Chun Jason Xue, Yuangang Wang, Yiran Chen, and Jingtong Hu (Oklahoma State University, USA; Tsinghua University, China; Syracuse University, USA; City University of Hong Kong, China; Huawei Technologies, China; Duke University, USA) @InProceedings{LCTES17p101, author = {Chen Pan and Mimi Xie and Yongpan Liu and Yanzhi Wang and Chun Jason Xue and Yuangang Wang and Yiran Chen and Jingtong Hu}, title = {A Lightweight Progress Maximization Scheduler for Non-volatile Processor under Unstable Energy Harvesting}, booktitle = {Proc.\ LCTES}, publisher = {ACM}, pages = {101-100}, doi = {}, year = {2017}, } Article: lctes17main-main9-p (type: Full Paper (10 pages)) doi:
	Wang, Zheng	LCTES '17: "Adaptive Optimization for ..." Adaptive Optimization for OpenCL Programs on Embedded Heterogeneous Systems Ben Taylor, Vicent Sanz Marco, and Zheng Wang (Lancaster University, UK) @InProceedings{LCTES17p11, author = {Ben Taylor and Vicent Sanz Marco and Zheng Wang}, title = {Adaptive Optimization for OpenCL Programs on Embedded Heterogeneous Systems}, booktitle = {Proc.\ LCTES}, publisher = {ACM}, pages = {11-10}, doi = {}, year = {2017}, } NOLINKDECO Article: lctes17main-main55-p (type: Full Paper (10 pages)) doi:
	Wu, Hui	LCTES '17: "Integrating Task Scheduling ..." Integrating Task Scheduling and Cache Locking for Multicore Real-Time Embedded Systems Wenguang Zheng, Hui Wu, and Chuanyao Nie (Tianjin University of Technology, China; UNSW, Australia) @InProceedings{LCTES17p71, author = {Wenguang Zheng and Hui Wu and Chuanyao Nie}, title = {Integrating Task Scheduling and Cache Locking for Multicore Real-Time Embedded Systems}, booktitle = {Proc.\ LCTES}, publisher = {ACM}, pages = {71-70}, doi = {}, year = {2017}, } Article: lctes17main-main25-p (type: Full Paper (10 pages)) doi:
	Wu, Jan-Jan	LCTES '17: "Dynamic Translation of Structured ..." Dynamic Translation of Structured Loads/Stores and Register Mapping for Architectures with SIMD Extensions Sheng-Yu Fu, Ding-Yong Hong, Yu-Ping Liu, Jan-Jan Wu, and Wei-Chung Hsu (National Taiwan University, Taiwan; Academia Sinica, Taiwan) @InProceedings{LCTES17p31, author = {Sheng-Yu Fu and Ding-Yong Hong and Yu-Ping Liu and Jan-Jan Wu and Wei-Chung Hsu}, title = {Dynamic Translation of Structured Loads/Stores and Register Mapping for Architectures with SIMD Extensions}, booktitle = {Proc.\ LCTES}, publisher = {ACM}, pages = {31-30}, doi = {}, year = {2017}, } Article: lctes17main-main13-p (type: Full Paper (10 pages)) doi:
	Xie, Mimi	LCTES '17: "A Lightweight Progress Maximization ..." A Lightweight Progress Maximization Scheduler for Non-volatile Processor under Unstable Energy Harvesting Chen Pan, Mimi Xie, Yongpan Liu, Yanzhi Wang, Chun Jason Xue, Yuangang Wang, Yiran Chen, and Jingtong Hu (Oklahoma State University, USA; Tsinghua University, China; Syracuse University, USA; City University of Hong Kong, China; Huawei Technologies, China; Duke University, USA) @InProceedings{LCTES17p101, author = {Chen Pan and Mimi Xie and Yongpan Liu and Yanzhi Wang and Chun Jason Xue and Yuangang Wang and Yiran Chen and Jingtong Hu}, title = {A Lightweight Progress Maximization Scheduler for Non-volatile Processor under Unstable Energy Harvesting}, booktitle = {Proc.\ LCTES}, publisher = {ACM}, pages = {101-100}, doi = {}, year = {2017}, } Article: lctes17main-main9-p (type: Full Paper (10 pages)) doi:
	Xue, Chun Jason	LCTES '17: "A Lightweight Progress Maximization ..." A Lightweight Progress Maximization Scheduler for Non-volatile Processor under Unstable Energy Harvesting Chen Pan, Mimi Xie, Yongpan Liu, Yanzhi Wang, Chun Jason Xue, Yuangang Wang, Yiran Chen, and Jingtong Hu (Oklahoma State University, USA; Tsinghua University, China; Syracuse University, USA; City University of Hong Kong, China; Huawei Technologies, China; Duke University, USA) @InProceedings{LCTES17p101, author = {Chen Pan and Mimi Xie and Yongpan Liu and Yanzhi Wang and Chun Jason Xue and Yuangang Wang and Yiran Chen and Jingtong Hu}, title = {A Lightweight Progress Maximization Scheduler for Non-volatile Processor under Unstable Energy Harvesting}, booktitle = {Proc.\ LCTES}, publisher = {ACM}, pages = {101-100}, doi = {}, year = {2017}, } Article: lctes17main-main9-p (type: Full Paper (10 pages)) doi:
	Yang, Jing	LCTES '17: "Towards Memory-Efficient Processing-in-Memory ..." Towards Memory-Efficient Processing-in-Memory Architecture for Convolutional Neural Networks Yi Wang, Mingxu Zhang, and Jing Yang (Shenzhen University, China; Institute of Computing Technology at Chinese Academy of Sciences, China; Harbin Institute of Technology, China) @InProceedings{LCTES17p81, author = {Yi Wang and Mingxu Zhang and Jing Yang}, title = {Towards Memory-Efficient Processing-in-Memory Architecture for Convolutional Neural Networks}, booktitle = {Proc.\ LCTES}, publisher = {ACM}, pages = {81-80}, doi = {}, year = {2017}, } Article: lctes17main-main23-p (type: Full Paper (10 pages)) doi:
	Ying, Yunhui	LCTES '17: "Towards SMT-Based LTL Model ..." Towards SMT-Based LTL Model Checking of Clock Constraint Specification Language for Real-Time and Embedded Systems Min Zhang and Yunhui Ying (East China Normal Univeristy, China) @InProceedings{LCTES17p61, author = {Min Zhang and Yunhui Ying}, title = {Towards SMT-Based LTL Model Checking of Clock Constraint Specification Language for Real-Time and Embedded Systems}, booktitle = {Proc.\ LCTES}, publisher = {ACM}, pages = {61-60}, doi = {}, year = {2017}, } Article: lctes17main-main37-p (type: Full Paper (10 pages)) doi:
	Zhang, Min	LCTES '17: "Towards SMT-Based LTL Model ..." Towards SMT-Based LTL Model Checking of Clock Constraint Specification Language for Real-Time and Embedded Systems Min Zhang and Yunhui Ying (East China Normal Univeristy, China) @InProceedings{LCTES17p61, author = {Min Zhang and Yunhui Ying}, title = {Towards SMT-Based LTL Model Checking of Clock Constraint Specification Language for Real-Time and Embedded Systems}, booktitle = {Proc.\ LCTES}, publisher = {ACM}, pages = {61-60}, doi = {}, year = {2017}, } Article: lctes17main-main37-p (type: Full Paper (10 pages)) doi:
	Zhang, Mingxu	LCTES '17: "Towards Memory-Efficient Processing-in-Memory ..." Towards Memory-Efficient Processing-in-Memory Architecture for Convolutional Neural Networks Yi Wang, Mingxu Zhang, and Jing Yang (Shenzhen University, China; Institute of Computing Technology at Chinese Academy of Sciences, China; Harbin Institute of Technology, China) @InProceedings{LCTES17p81, author = {Yi Wang and Mingxu Zhang and Jing Yang}, title = {Towards Memory-Efficient Processing-in-Memory Architecture for Convolutional Neural Networks}, booktitle = {Proc.\ LCTES}, publisher = {ACM}, pages = {81-80}, doi = {}, year = {2017}, } Article: lctes17main-main23-p (type: Full Paper (10 pages)) doi:
	Zhang, Zhiyong	LCTES '17: "Unified nvTCAM and sTCAM Architecture ..." Unified nvTCAM and sTCAM Architecture for Improving Packet Matching Performance Xianzhong Ding, Zhiyong Zhang, Zhiping Jia, Lei Ju, Mengying Zhao, and Huawei Huang (Shandong University, China; University of Aizu, Japan) @InProceedings{LCTES17p91, author = {Xianzhong Ding and Zhiyong Zhang and Zhiping Jia and Lei Ju and Mengying Zhao and Huawei Huang}, title = {Unified nvTCAM and sTCAM Architecture for Improving Packet Matching Performance}, booktitle = {Proc.\ LCTES}, publisher = {ACM}, pages = {91-90}, doi = {}, year = {2017}, } Article: lctes17main-main36-p (type: Full Paper (10 pages)) doi:
	Zhao, Mengying	LCTES '17: "Unified nvTCAM and sTCAM Architecture ..." Unified nvTCAM and sTCAM Architecture for Improving Packet Matching Performance Xianzhong Ding, Zhiyong Zhang, Zhiping Jia, Lei Ju, Mengying Zhao, and Huawei Huang (Shandong University, China; University of Aizu, Japan) @InProceedings{LCTES17p91, author = {Xianzhong Ding and Zhiyong Zhang and Zhiping Jia and Lei Ju and Mengying Zhao and Huawei Huang}, title = {Unified nvTCAM and sTCAM Architecture for Improving Packet Matching Performance}, booktitle = {Proc.\ LCTES}, publisher = {ACM}, pages = {91-90}, doi = {}, year = {2017}, } Article: lctes17main-main36-p (type: Full Paper (10 pages)) doi:
	Zheng, Wenguang	LCTES '17: "Integrating Task Scheduling ..." Integrating Task Scheduling and Cache Locking for Multicore Real-Time Embedded Systems Wenguang Zheng, Hui Wu, and Chuanyao Nie (Tianjin University of Technology, China; UNSW, Australia) @InProceedings{LCTES17p71, author = {Wenguang Zheng and Hui Wu and Chuanyao Nie}, title = {Integrating Task Scheduling and Cache Locking for Multicore Real-Time Embedded Systems}, booktitle = {Proc.\ LCTES}, publisher = {ACM}, pages = {71-70}, doi = {}, year = {2017}, } Article: lctes17main-main25-p (type: Full Paper (10 pages)) doi:
	Zhuge, Qingfeng	LCTES '17: "Optimal Functional Unit Assignment ..." Optimal Functional Unit Assignment and Voltage Selection for Pipelined MPSoC with Guaranteed Probability on Time Performance Weiwen Jiang, Edwin H.-M. Sha, Qingfeng Zhuge, Hailiang Dong, and Xianzhang Chen (Chongqing University, China) @InProceedings{LCTES17p41, author = {Weiwen Jiang and Edwin H.-M. Sha and Qingfeng Zhuge and Hailiang Dong and Xianzhang Chen}, title = {Optimal Functional Unit Assignment and Voltage Selection for Pipelined MPSoC with Guaranteed Probability on Time Performance}, booktitle = {Proc.\ LCTES}, publisher = {ACM}, pages = {41-40}, doi = {}, year = {2017}, } Article: lctes17main-main40-p (type: Full Paper (10 pages)) doi:

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