ESEC/FSE 2013 – Author Index |
Contents -
Abstracts -
Authors
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B C D E G H J K L M N P R S T W Z
Bando, Yosuke |
ESEC/FSE '13-INDUSTRIAL: "ShAir: Extensible Middleware ..."
ShAir: Extensible Middleware for Mobile Peer-to-Peer Resource Sharing
Daniel J. Dubois, Yosuke Bando, Konosuke Watanabe, and Henry Holtzman (Massachusetts Institute of Technology, USA; Toshiba, Japan) ShAir is a middleware infrastructure that allows mobile applications to share resources of their devices (e.g., data, storage, connectivity, computation) in a transparent way. The goals of ShAir are: (i) abstracting the creation and maintenance of opportunistic delay-tolerant peer-to-peer networks; (ii) being decoupled from the actual hardware and network platform; (iii) extensibility in terms of supported hardware, protocols, and on the type of resources that can be shared; (iv) being capable of self-adapting at run-time; (v) enabling the development of applications that are easier to design, test, and simulate. In this paper we discuss the design, extensibility, and maintainability of the ShAir middleware, and how to use it as a platform for collaborative resource-sharing applications. Finally we show our experience in designing and testing a file-sharing application. @InProceedings{ESEC/FSE13p687, author = {Daniel J. Dubois and Yosuke Bando and Konosuke Watanabe and Henry Holtzman}, title = {ShAir: Extensible Middleware for Mobile Peer-to-Peer Resource Sharing}, booktitle = {Proc.\ ESEC/FSE}, publisher = {ACM}, pages = {687--690}, doi = {}, year = {2013}, } Info |
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Chimdyalwar, Bharti |
ESEC/FSE '13-INDUSTRIAL: "Precise Range Analysis on ..."
Precise Range Analysis on Large Industry Code
Shrawan Kumar, Bharti Chimdyalwar, and Ulka Shrotri (Tata Consultancy Services, India) Abstract interpretation is widely used to perform static code analysis with non-relational (interval) as well as relational (difference-bound matrices, polyhedral) domains. Analysis using non-relational domains is highly scalable but delivers imprecise results, whereas, use of relational domains produces precise results but does not scale up. We have developed a tool that implements K-limited path sensitive interval domain analysis to get precise results without losing on scalability. The tool was able to successfully analyse 10 million lines of embedded code for different properties such as division by zero, array index out of bound (AIOB), overflow-underflow and so on. This paper presents details of the tool and results of our experiments for detecting AIOB property. A comparison with the existing tools in the market demonstrates that our tool is more precise and scales better. @InProceedings{ESEC/FSE13p675, author = {Shrawan Kumar and Bharti Chimdyalwar and Ulka Shrotri}, title = {Precise Range Analysis on Large Industry Code}, booktitle = {Proc.\ ESEC/FSE}, publisher = {ACM}, pages = {675--678}, doi = {}, year = {2013}, } |
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De Gooijer, Thijmen |
ESEC/FSE '13-INDUSTRIAL: "Agreements for Software Reuse ..."
Agreements for Software Reuse in Corporations
Thijmen de Gooijer and Heiko Koziolek (ABB Research, Sweden; ABB Research, Germany) Agreements for sharing of software between entities in a corporation have to be tailored to fit the situation. Such agreements are not legal documents and must address different issues than traditional software licenses. We found that these agreements should cover what is granted, payment, support, ownership and liability. In a case study we learned that an agreement should list its assumptions on the structure and processes of the software organization. The presented work enables others to create guidelines for software sharing agreements tailored to their organization and shares lessons about the differences between software product lines and corporate software sharing and reuse. @InProceedings{ESEC/FSE13p679, author = {Thijmen de Gooijer and Heiko Koziolek}, title = {Agreements for Software Reuse in Corporations}, booktitle = {Proc.\ ESEC/FSE}, publisher = {ACM}, pages = {679--682}, doi = {}, year = {2013}, } |
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Deng, Yangdong |
ESEC/FSE '13-INDUSTRIAL: "Design and Optimization of ..."
Design and Optimization of Multi-clocked Embedded Systems using Formal Technique
Yu Jiang , Zonghui Li, Hehua Zhang, Yangdong Deng, Xiaoyu Song, Ming Gu, and Jiaguang Sun (Tsinghua University, China; Portland State University, USA) Today’s system-on-chip and distributed systems are commonly equipped with multiple clocks. The key challenge in designing such systems is that heterogenous control-oriented and data-oriented behaviors within one clock domain, and asynchronous communications between two clock domains have to be captured and evaluated in a single framework. In this paper, we propose to use timed automata and synchronous dataflow to capture the dynamic behaviors of multi-clock embedded systems. A timed automata and synchronous dataflow based modeling and analyzing framework is constructed to evaluate and optimize the performance of multiclock embedded systems. Data-oriented behaviors are captured by synchronous dataflow, while synchronous control-oriented behaviors are captured by timed automata, and inter clock-domain asynchronous communication can be modeled in an interface timed automaton or a synchronous dataflow module with the CSP mechanism. The behaviors of synchronous dataflow are interpreted by some equivalent timed automata to maintain the semantic consistency of the mixed model. Then, various functional properties can be simulated and verified within the framework. We apply this framework in the design process of a sub-system that is used in real world subway communication control system @InProceedings{ESEC/FSE13p703, author = {Yu Jiang and Zonghui Li and Hehua Zhang and Yangdong Deng and Xiaoyu Song and Ming Gu and Jiaguang Sun}, title = {Design and Optimization of Multi-clocked Embedded Systems using Formal Technique}, booktitle = {Proc.\ ESEC/FSE}, publisher = {ACM}, pages = {703--706}, doi = {}, year = {2013}, } |
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Dubois, Daniel J. |
ESEC/FSE '13-INDUSTRIAL: "ShAir: Extensible Middleware ..."
ShAir: Extensible Middleware for Mobile Peer-to-Peer Resource Sharing
Daniel J. Dubois, Yosuke Bando, Konosuke Watanabe, and Henry Holtzman (Massachusetts Institute of Technology, USA; Toshiba, Japan) ShAir is a middleware infrastructure that allows mobile applications to share resources of their devices (e.g., data, storage, connectivity, computation) in a transparent way. The goals of ShAir are: (i) abstracting the creation and maintenance of opportunistic delay-tolerant peer-to-peer networks; (ii) being decoupled from the actual hardware and network platform; (iii) extensibility in terms of supported hardware, protocols, and on the type of resources that can be shared; (iv) being capable of self-adapting at run-time; (v) enabling the development of applications that are easier to design, test, and simulate. In this paper we discuss the design, extensibility, and maintainability of the ShAir middleware, and how to use it as a platform for collaborative resource-sharing applications. Finally we show our experience in designing and testing a file-sharing application. @InProceedings{ESEC/FSE13p687, author = {Daniel J. Dubois and Yosuke Bando and Konosuke Watanabe and Henry Holtzman}, title = {ShAir: Extensible Middleware for Mobile Peer-to-Peer Resource Sharing}, booktitle = {Proc.\ ESEC/FSE}, publisher = {ACM}, pages = {687--690}, doi = {}, year = {2013}, } Info |
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Escoffier, Clement |
ESEC/FSE '13-INDUSTRIAL: "h-ubu: An Industrial-Strength ..."
h-ubu: An Industrial-Strength Service-Oriented Component Framework for JavaScript Applications
Clement Escoffier, Philippe Lalanda, and Nicolas Rempulsky (Grenoble University, France; Ubidreams, France) In the last years, we developed web applications requiring a large amount of JavaScript code. These web applications present adaptation requirements. In addition to platform-centric adaptation, applications have to dynamically react to external events like connectivity disruptions. Building such applications is complex and we faced sharp maintainability challenges. This paper presents h-ubu, a service-oriented component framework for JavaScript allowing building adaptive applications. h-ubu is used in industrial web applications and mobile applications. h-ubu is available in open source, as part of the OW2 Nanoko project. @InProceedings{ESEC/FSE13p699, author = {Clement Escoffier and Philippe Lalanda and Nicolas Rempulsky}, title = {h-ubu: An Industrial-Strength Service-Oriented Component Framework for JavaScript Applications}, booktitle = {Proc.\ ESEC/FSE}, publisher = {ACM}, pages = {699--702}, doi = {}, year = {2013}, } |
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Gu, Ming |
ESEC/FSE '13-INDUSTRIAL: "Design and Optimization of ..."
Design and Optimization of Multi-clocked Embedded Systems using Formal Technique
Yu Jiang , Zonghui Li, Hehua Zhang, Yangdong Deng, Xiaoyu Song, Ming Gu, and Jiaguang Sun (Tsinghua University, China; Portland State University, USA) Today’s system-on-chip and distributed systems are commonly equipped with multiple clocks. The key challenge in designing such systems is that heterogenous control-oriented and data-oriented behaviors within one clock domain, and asynchronous communications between two clock domains have to be captured and evaluated in a single framework. In this paper, we propose to use timed automata and synchronous dataflow to capture the dynamic behaviors of multi-clock embedded systems. A timed automata and synchronous dataflow based modeling and analyzing framework is constructed to evaluate and optimize the performance of multiclock embedded systems. Data-oriented behaviors are captured by synchronous dataflow, while synchronous control-oriented behaviors are captured by timed automata, and inter clock-domain asynchronous communication can be modeled in an interface timed automaton or a synchronous dataflow module with the CSP mechanism. The behaviors of synchronous dataflow are interpreted by some equivalent timed automata to maintain the semantic consistency of the mixed model. Then, various functional properties can be simulated and verified within the framework. We apply this framework in the design process of a sub-system that is used in real world subway communication control system @InProceedings{ESEC/FSE13p703, author = {Yu Jiang and Zonghui Li and Hehua Zhang and Yangdong Deng and Xiaoyu Song and Ming Gu and Jiaguang Sun}, title = {Design and Optimization of Multi-clocked Embedded Systems using Formal Technique}, booktitle = {Proc.\ ESEC/FSE}, publisher = {ACM}, pages = {703--706}, doi = {}, year = {2013}, } ESEC/FSE '13-INDUSTRIAL: "System Reliability Calculation ..." System Reliability Calculation Based on the Run-Time Analysis of Ladder Program Yu Jiang , Hehua Zhang, Han Liu, Xiaoyu Song, William N. N. Hung, Ming Gu, and Jiaguang Sun (Tsinghua University, China; Portland State University, USA) Programmable logic controller (PLC) system is a typical kind of embedded system that is widely used in industry. The complexity of reliability analysis of safety critical PLC systems arises in handling the temporal correlations among the system components caused by the run-time execution logic of the embedded ladder program. In this paper, we propose a novel probabilistic model for the reliability analysis of PLC systems, called run-time reliability model (RRM). It is constructed based on the structure and run-time execution of the embedded ladder program, automatically. Then, we present some custom-made conditional probability distribution (CPD) tables according to the execution semantics of the RRM nodes, and insert the reliability probability of each system component referenced by the node into the corresponding CPD table. The proposed model is accurate and fast compared to previous work as described in the experiment results. @InProceedings{ESEC/FSE13p695, author = {Yu Jiang and Hehua Zhang and Han Liu and Xiaoyu Song and William N. N. Hung and Ming Gu and Jiaguang Sun}, title = {System Reliability Calculation Based on the Run-Time Analysis of Ladder Program}, booktitle = {Proc.\ ESEC/FSE}, publisher = {ACM}, pages = {695--698}, doi = {}, year = {2013}, } |
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Hackbarth, Randy |
ESEC/FSE '13-INDUSTRIAL: "Risky Files: An Approach to ..."
Risky Files: An Approach to Focus Quality Improvement Effort
Audris Mockus, Randy Hackbarth, and John Palframan (Avaya Labs Research, USA) As the development of software products frequently transitions among globally distributed teams, the knowledge about the source code, design decisions, original requirements, and the history of troublesome areas gets lost. A new team faces tremendous challenges to regain that knowledge. In numerous projects we observed that only 1% of project files are involved in more than 60% of the customer reported defects (CFDs), thus focusing quality improvement on such files can greatly reduce the risk of poor product quality. We describe a mostly automated approach that annotates the source code at the file and module level with the historic information from multiple version control, issue tracking, and an organization's directory systems. Risk factors (e.g, past changes and authors who left the project) are identified via a regression model and the riskiest areas undergo a structured evaluation by experts. The results are presented via a web-based tool and project experts are then trained how to use the tool in conjunction with a checklist to determine risk remediation actions for each risky file. We have deployed the approach in seven projects in Avaya and are continuing deployment to the remaining projects as we are evaluating the results of earlier deployments. The approach is particularly helpful to focus quality improvement effort for new releases of deployed products in a resource-constrained environment. @InProceedings{ESEC/FSE13p691, author = {Audris Mockus and Randy Hackbarth and John Palframan}, title = {Risky Files: An Approach to Focus Quality Improvement Effort}, booktitle = {Proc.\ ESEC/FSE}, publisher = {ACM}, pages = {691--694}, doi = {}, year = {2013}, } |
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Holtzman, Henry |
ESEC/FSE '13-INDUSTRIAL: "ShAir: Extensible Middleware ..."
ShAir: Extensible Middleware for Mobile Peer-to-Peer Resource Sharing
Daniel J. Dubois, Yosuke Bando, Konosuke Watanabe, and Henry Holtzman (Massachusetts Institute of Technology, USA; Toshiba, Japan) ShAir is a middleware infrastructure that allows mobile applications to share resources of their devices (e.g., data, storage, connectivity, computation) in a transparent way. The goals of ShAir are: (i) abstracting the creation and maintenance of opportunistic delay-tolerant peer-to-peer networks; (ii) being decoupled from the actual hardware and network platform; (iii) extensibility in terms of supported hardware, protocols, and on the type of resources that can be shared; (iv) being capable of self-adapting at run-time; (v) enabling the development of applications that are easier to design, test, and simulate. In this paper we discuss the design, extensibility, and maintainability of the ShAir middleware, and how to use it as a platform for collaborative resource-sharing applications. Finally we show our experience in designing and testing a file-sharing application. @InProceedings{ESEC/FSE13p687, author = {Daniel J. Dubois and Yosuke Bando and Konosuke Watanabe and Henry Holtzman}, title = {ShAir: Extensible Middleware for Mobile Peer-to-Peer Resource Sharing}, booktitle = {Proc.\ ESEC/FSE}, publisher = {ACM}, pages = {687--690}, doi = {}, year = {2013}, } Info |
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Hung, William N. N. |
ESEC/FSE '13-INDUSTRIAL: "System Reliability Calculation ..."
System Reliability Calculation Based on the Run-Time Analysis of Ladder Program
Yu Jiang , Hehua Zhang, Han Liu, Xiaoyu Song, William N. N. Hung, Ming Gu, and Jiaguang Sun (Tsinghua University, China; Portland State University, USA) Programmable logic controller (PLC) system is a typical kind of embedded system that is widely used in industry. The complexity of reliability analysis of safety critical PLC systems arises in handling the temporal correlations among the system components caused by the run-time execution logic of the embedded ladder program. In this paper, we propose a novel probabilistic model for the reliability analysis of PLC systems, called run-time reliability model (RRM). It is constructed based on the structure and run-time execution of the embedded ladder program, automatically. Then, we present some custom-made conditional probability distribution (CPD) tables according to the execution semantics of the RRM nodes, and insert the reliability probability of each system component referenced by the node into the corresponding CPD table. The proposed model is accurate and fast compared to previous work as described in the experiment results. @InProceedings{ESEC/FSE13p695, author = {Yu Jiang and Hehua Zhang and Han Liu and Xiaoyu Song and William N. N. Hung and Ming Gu and Jiaguang Sun}, title = {System Reliability Calculation Based on the Run-Time Analysis of Ladder Program}, booktitle = {Proc.\ ESEC/FSE}, publisher = {ACM}, pages = {695--698}, doi = {}, year = {2013}, } |
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Jiang, Yu |
ESEC/FSE '13-INDUSTRIAL: "Design and Optimization of ..."
Design and Optimization of Multi-clocked Embedded Systems using Formal Technique
Yu Jiang , Zonghui Li, Hehua Zhang, Yangdong Deng, Xiaoyu Song, Ming Gu, and Jiaguang Sun (Tsinghua University, China; Portland State University, USA) Today’s system-on-chip and distributed systems are commonly equipped with multiple clocks. The key challenge in designing such systems is that heterogenous control-oriented and data-oriented behaviors within one clock domain, and asynchronous communications between two clock domains have to be captured and evaluated in a single framework. In this paper, we propose to use timed automata and synchronous dataflow to capture the dynamic behaviors of multi-clock embedded systems. A timed automata and synchronous dataflow based modeling and analyzing framework is constructed to evaluate and optimize the performance of multiclock embedded systems. Data-oriented behaviors are captured by synchronous dataflow, while synchronous control-oriented behaviors are captured by timed automata, and inter clock-domain asynchronous communication can be modeled in an interface timed automaton or a synchronous dataflow module with the CSP mechanism. The behaviors of synchronous dataflow are interpreted by some equivalent timed automata to maintain the semantic consistency of the mixed model. Then, various functional properties can be simulated and verified within the framework. We apply this framework in the design process of a sub-system that is used in real world subway communication control system @InProceedings{ESEC/FSE13p703, author = {Yu Jiang and Zonghui Li and Hehua Zhang and Yangdong Deng and Xiaoyu Song and Ming Gu and Jiaguang Sun}, title = {Design and Optimization of Multi-clocked Embedded Systems using Formal Technique}, booktitle = {Proc.\ ESEC/FSE}, publisher = {ACM}, pages = {703--706}, doi = {}, year = {2013}, } ESEC/FSE '13-INDUSTRIAL: "System Reliability Calculation ..." System Reliability Calculation Based on the Run-Time Analysis of Ladder Program Yu Jiang , Hehua Zhang, Han Liu, Xiaoyu Song, William N. N. Hung, Ming Gu, and Jiaguang Sun (Tsinghua University, China; Portland State University, USA) Programmable logic controller (PLC) system is a typical kind of embedded system that is widely used in industry. The complexity of reliability analysis of safety critical PLC systems arises in handling the temporal correlations among the system components caused by the run-time execution logic of the embedded ladder program. In this paper, we propose a novel probabilistic model for the reliability analysis of PLC systems, called run-time reliability model (RRM). It is constructed based on the structure and run-time execution of the embedded ladder program, automatically. Then, we present some custom-made conditional probability distribution (CPD) tables according to the execution semantics of the RRM nodes, and insert the reliability probability of each system component referenced by the node into the corresponding CPD table. The proposed model is accurate and fast compared to previous work as described in the experiment results. @InProceedings{ESEC/FSE13p695, author = {Yu Jiang and Hehua Zhang and Han Liu and Xiaoyu Song and William N. N. Hung and Ming Gu and Jiaguang Sun}, title = {System Reliability Calculation Based on the Run-Time Analysis of Ladder Program}, booktitle = {Proc.\ ESEC/FSE}, publisher = {ACM}, pages = {695--698}, doi = {}, year = {2013}, } |
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Koziolek, Heiko |
ESEC/FSE '13-INDUSTRIAL: "Agreements for Software Reuse ..."
Agreements for Software Reuse in Corporations
Thijmen de Gooijer and Heiko Koziolek (ABB Research, Sweden; ABB Research, Germany) Agreements for sharing of software between entities in a corporation have to be tailored to fit the situation. Such agreements are not legal documents and must address different issues than traditional software licenses. We found that these agreements should cover what is granted, payment, support, ownership and liability. In a case study we learned that an agreement should list its assumptions on the structure and processes of the software organization. The presented work enables others to create guidelines for software sharing agreements tailored to their organization and shares lessons about the differences between software product lines and corporate software sharing and reuse. @InProceedings{ESEC/FSE13p679, author = {Thijmen de Gooijer and Heiko Koziolek}, title = {Agreements for Software Reuse in Corporations}, booktitle = {Proc.\ ESEC/FSE}, publisher = {ACM}, pages = {679--682}, doi = {}, year = {2013}, } |
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Kumar, Rahul |
ESEC/FSE '13-INDUSTRIAL: "The Economics of Static Analysis ..."
The Economics of Static Analysis Tools
Rahul Kumar and Aditya V. Nori (Microsoft Research, India) Static analysis tools have experienced a dichotomy over the span of the last decade. They have proven themselves to be useful in many domains, but at the same time have not (in general) experienced any notable concrete integration into a development environment. This is partly due to the inherent complexity of the tools themselves, as well as due to other intangible factors. Such factors usually tend to include questions about the return on investment of the tool and the value the tool provides in a development environment. In this paper, we present an empirical model for evaluating static analysis tools from the perspective of the economic value they provide. We further apply this model to a case study of the Static Driver Verier (SDV) tool that ships with the Windows Driver Kit and show the usefulness of the model and the tool. @InProceedings{ESEC/FSE13p707, author = {Rahul Kumar and Aditya V. Nori}, title = {The Economics of Static Analysis Tools}, booktitle = {Proc.\ ESEC/FSE}, publisher = {ACM}, pages = {707--710}, doi = {}, year = {2013}, } |
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Kumar, Shrawan |
ESEC/FSE '13-INDUSTRIAL: "Precise Range Analysis on ..."
Precise Range Analysis on Large Industry Code
Shrawan Kumar, Bharti Chimdyalwar, and Ulka Shrotri (Tata Consultancy Services, India) Abstract interpretation is widely used to perform static code analysis with non-relational (interval) as well as relational (difference-bound matrices, polyhedral) domains. Analysis using non-relational domains is highly scalable but delivers imprecise results, whereas, use of relational domains produces precise results but does not scale up. We have developed a tool that implements K-limited path sensitive interval domain analysis to get precise results without losing on scalability. The tool was able to successfully analyse 10 million lines of embedded code for different properties such as division by zero, array index out of bound (AIOB), overflow-underflow and so on. This paper presents details of the tool and results of our experiments for detecting AIOB property. A comparison with the existing tools in the market demonstrates that our tool is more precise and scales better. @InProceedings{ESEC/FSE13p675, author = {Shrawan Kumar and Bharti Chimdyalwar and Ulka Shrotri}, title = {Precise Range Analysis on Large Industry Code}, booktitle = {Proc.\ ESEC/FSE}, publisher = {ACM}, pages = {675--678}, doi = {}, year = {2013}, } |
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Lalanda, Philippe |
ESEC/FSE '13-INDUSTRIAL: "h-ubu: An Industrial-Strength ..."
h-ubu: An Industrial-Strength Service-Oriented Component Framework for JavaScript Applications
Clement Escoffier, Philippe Lalanda, and Nicolas Rempulsky (Grenoble University, France; Ubidreams, France) In the last years, we developed web applications requiring a large amount of JavaScript code. These web applications present adaptation requirements. In addition to platform-centric adaptation, applications have to dynamically react to external events like connectivity disruptions. Building such applications is complex and we faced sharp maintainability challenges. This paper presents h-ubu, a service-oriented component framework for JavaScript allowing building adaptive applications. h-ubu is used in industrial web applications and mobile applications. h-ubu is available in open source, as part of the OW2 Nanoko project. @InProceedings{ESEC/FSE13p699, author = {Clement Escoffier and Philippe Lalanda and Nicolas Rempulsky}, title = {h-ubu: An Industrial-Strength Service-Oriented Component Framework for JavaScript Applications}, booktitle = {Proc.\ ESEC/FSE}, publisher = {ACM}, pages = {699--702}, doi = {}, year = {2013}, } |
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Li, Zonghui |
ESEC/FSE '13-INDUSTRIAL: "Design and Optimization of ..."
Design and Optimization of Multi-clocked Embedded Systems using Formal Technique
Yu Jiang , Zonghui Li, Hehua Zhang, Yangdong Deng, Xiaoyu Song, Ming Gu, and Jiaguang Sun (Tsinghua University, China; Portland State University, USA) Today’s system-on-chip and distributed systems are commonly equipped with multiple clocks. The key challenge in designing such systems is that heterogenous control-oriented and data-oriented behaviors within one clock domain, and asynchronous communications between two clock domains have to be captured and evaluated in a single framework. In this paper, we propose to use timed automata and synchronous dataflow to capture the dynamic behaviors of multi-clock embedded systems. A timed automata and synchronous dataflow based modeling and analyzing framework is constructed to evaluate and optimize the performance of multiclock embedded systems. Data-oriented behaviors are captured by synchronous dataflow, while synchronous control-oriented behaviors are captured by timed automata, and inter clock-domain asynchronous communication can be modeled in an interface timed automaton or a synchronous dataflow module with the CSP mechanism. The behaviors of synchronous dataflow are interpreted by some equivalent timed automata to maintain the semantic consistency of the mixed model. Then, various functional properties can be simulated and verified within the framework. We apply this framework in the design process of a sub-system that is used in real world subway communication control system @InProceedings{ESEC/FSE13p703, author = {Yu Jiang and Zonghui Li and Hehua Zhang and Yangdong Deng and Xiaoyu Song and Ming Gu and Jiaguang Sun}, title = {Design and Optimization of Multi-clocked Embedded Systems using Formal Technique}, booktitle = {Proc.\ ESEC/FSE}, publisher = {ACM}, pages = {703--706}, doi = {}, year = {2013}, } |
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Liu, Han |
ESEC/FSE '13-INDUSTRIAL: "System Reliability Calculation ..."
System Reliability Calculation Based on the Run-Time Analysis of Ladder Program
Yu Jiang , Hehua Zhang, Han Liu, Xiaoyu Song, William N. N. Hung, Ming Gu, and Jiaguang Sun (Tsinghua University, China; Portland State University, USA) Programmable logic controller (PLC) system is a typical kind of embedded system that is widely used in industry. The complexity of reliability analysis of safety critical PLC systems arises in handling the temporal correlations among the system components caused by the run-time execution logic of the embedded ladder program. In this paper, we propose a novel probabilistic model for the reliability analysis of PLC systems, called run-time reliability model (RRM). It is constructed based on the structure and run-time execution of the embedded ladder program, automatically. Then, we present some custom-made conditional probability distribution (CPD) tables according to the execution semantics of the RRM nodes, and insert the reliability probability of each system component referenced by the node into the corresponding CPD table. The proposed model is accurate and fast compared to previous work as described in the experiment results. @InProceedings{ESEC/FSE13p695, author = {Yu Jiang and Hehua Zhang and Han Liu and Xiaoyu Song and William N. N. Hung and Ming Gu and Jiaguang Sun}, title = {System Reliability Calculation Based on the Run-Time Analysis of Ladder Program}, booktitle = {Proc.\ ESEC/FSE}, publisher = {ACM}, pages = {695--698}, doi = {}, year = {2013}, } |
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Mockus, Audris |
ESEC/FSE '13-INDUSTRIAL: "Risky Files: An Approach to ..."
Risky Files: An Approach to Focus Quality Improvement Effort
Audris Mockus, Randy Hackbarth, and John Palframan (Avaya Labs Research, USA) As the development of software products frequently transitions among globally distributed teams, the knowledge about the source code, design decisions, original requirements, and the history of troublesome areas gets lost. A new team faces tremendous challenges to regain that knowledge. In numerous projects we observed that only 1% of project files are involved in more than 60% of the customer reported defects (CFDs), thus focusing quality improvement on such files can greatly reduce the risk of poor product quality. We describe a mostly automated approach that annotates the source code at the file and module level with the historic information from multiple version control, issue tracking, and an organization's directory systems. Risk factors (e.g, past changes and authors who left the project) are identified via a regression model and the riskiest areas undergo a structured evaluation by experts. The results are presented via a web-based tool and project experts are then trained how to use the tool in conjunction with a checklist to determine risk remediation actions for each risky file. We have deployed the approach in seven projects in Avaya and are continuing deployment to the remaining projects as we are evaluating the results of earlier deployments. The approach is particularly helpful to focus quality improvement effort for new releases of deployed products in a resource-constrained environment. @InProceedings{ESEC/FSE13p691, author = {Audris Mockus and Randy Hackbarth and John Palframan}, title = {Risky Files: An Approach to Focus Quality Improvement Effort}, booktitle = {Proc.\ ESEC/FSE}, publisher = {ACM}, pages = {691--694}, doi = {}, year = {2013}, } |
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Nori, Aditya V. |
ESEC/FSE '13-INDUSTRIAL: "The Economics of Static Analysis ..."
The Economics of Static Analysis Tools
Rahul Kumar and Aditya V. Nori (Microsoft Research, India) Static analysis tools have experienced a dichotomy over the span of the last decade. They have proven themselves to be useful in many domains, but at the same time have not (in general) experienced any notable concrete integration into a development environment. This is partly due to the inherent complexity of the tools themselves, as well as due to other intangible factors. Such factors usually tend to include questions about the return on investment of the tool and the value the tool provides in a development environment. In this paper, we present an empirical model for evaluating static analysis tools from the perspective of the economic value they provide. We further apply this model to a case study of the Static Driver Verier (SDV) tool that ships with the Windows Driver Kit and show the usefulness of the model and the tool. @InProceedings{ESEC/FSE13p707, author = {Rahul Kumar and Aditya V. Nori}, title = {The Economics of Static Analysis Tools}, booktitle = {Proc.\ ESEC/FSE}, publisher = {ACM}, pages = {707--710}, doi = {}, year = {2013}, } |
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Palframan, John |
ESEC/FSE '13-INDUSTRIAL: "Risky Files: An Approach to ..."
Risky Files: An Approach to Focus Quality Improvement Effort
Audris Mockus, Randy Hackbarth, and John Palframan (Avaya Labs Research, USA) As the development of software products frequently transitions among globally distributed teams, the knowledge about the source code, design decisions, original requirements, and the history of troublesome areas gets lost. A new team faces tremendous challenges to regain that knowledge. In numerous projects we observed that only 1% of project files are involved in more than 60% of the customer reported defects (CFDs), thus focusing quality improvement on such files can greatly reduce the risk of poor product quality. We describe a mostly automated approach that annotates the source code at the file and module level with the historic information from multiple version control, issue tracking, and an organization's directory systems. Risk factors (e.g, past changes and authors who left the project) are identified via a regression model and the riskiest areas undergo a structured evaluation by experts. The results are presented via a web-based tool and project experts are then trained how to use the tool in conjunction with a checklist to determine risk remediation actions for each risky file. We have deployed the approach in seven projects in Avaya and are continuing deployment to the remaining projects as we are evaluating the results of earlier deployments. The approach is particularly helpful to focus quality improvement effort for new releases of deployed products in a resource-constrained environment. @InProceedings{ESEC/FSE13p691, author = {Audris Mockus and Randy Hackbarth and John Palframan}, title = {Risky Files: An Approach to Focus Quality Improvement Effort}, booktitle = {Proc.\ ESEC/FSE}, publisher = {ACM}, pages = {691--694}, doi = {}, year = {2013}, } |
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Rempulsky, Nicolas |
ESEC/FSE '13-INDUSTRIAL: "h-ubu: An Industrial-Strength ..."
h-ubu: An Industrial-Strength Service-Oriented Component Framework for JavaScript Applications
Clement Escoffier, Philippe Lalanda, and Nicolas Rempulsky (Grenoble University, France; Ubidreams, France) In the last years, we developed web applications requiring a large amount of JavaScript code. These web applications present adaptation requirements. In addition to platform-centric adaptation, applications have to dynamically react to external events like connectivity disruptions. Building such applications is complex and we faced sharp maintainability challenges. This paper presents h-ubu, a service-oriented component framework for JavaScript allowing building adaptive applications. h-ubu is used in industrial web applications and mobile applications. h-ubu is available in open source, as part of the OW2 Nanoko project. @InProceedings{ESEC/FSE13p699, author = {Clement Escoffier and Philippe Lalanda and Nicolas Rempulsky}, title = {h-ubu: An Industrial-Strength Service-Oriented Component Framework for JavaScript Applications}, booktitle = {Proc.\ ESEC/FSE}, publisher = {ACM}, pages = {699--702}, doi = {}, year = {2013}, } |
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Shrotri, Ulka |
ESEC/FSE '13-INDUSTRIAL: "Precise Range Analysis on ..."
Precise Range Analysis on Large Industry Code
Shrawan Kumar, Bharti Chimdyalwar, and Ulka Shrotri (Tata Consultancy Services, India) Abstract interpretation is widely used to perform static code analysis with non-relational (interval) as well as relational (difference-bound matrices, polyhedral) domains. Analysis using non-relational domains is highly scalable but delivers imprecise results, whereas, use of relational domains produces precise results but does not scale up. We have developed a tool that implements K-limited path sensitive interval domain analysis to get precise results without losing on scalability. The tool was able to successfully analyse 10 million lines of embedded code for different properties such as division by zero, array index out of bound (AIOB), overflow-underflow and so on. This paper presents details of the tool and results of our experiments for detecting AIOB property. A comparison with the existing tools in the market demonstrates that our tool is more precise and scales better. @InProceedings{ESEC/FSE13p675, author = {Shrawan Kumar and Bharti Chimdyalwar and Ulka Shrotri}, title = {Precise Range Analysis on Large Industry Code}, booktitle = {Proc.\ ESEC/FSE}, publisher = {ACM}, pages = {675--678}, doi = {}, year = {2013}, } |
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Song, Xiaoyu |
ESEC/FSE '13-INDUSTRIAL: "Design and Optimization of ..."
Design and Optimization of Multi-clocked Embedded Systems using Formal Technique
Yu Jiang , Zonghui Li, Hehua Zhang, Yangdong Deng, Xiaoyu Song, Ming Gu, and Jiaguang Sun (Tsinghua University, China; Portland State University, USA) Today’s system-on-chip and distributed systems are commonly equipped with multiple clocks. The key challenge in designing such systems is that heterogenous control-oriented and data-oriented behaviors within one clock domain, and asynchronous communications between two clock domains have to be captured and evaluated in a single framework. In this paper, we propose to use timed automata and synchronous dataflow to capture the dynamic behaviors of multi-clock embedded systems. A timed automata and synchronous dataflow based modeling and analyzing framework is constructed to evaluate and optimize the performance of multiclock embedded systems. Data-oriented behaviors are captured by synchronous dataflow, while synchronous control-oriented behaviors are captured by timed automata, and inter clock-domain asynchronous communication can be modeled in an interface timed automaton or a synchronous dataflow module with the CSP mechanism. The behaviors of synchronous dataflow are interpreted by some equivalent timed automata to maintain the semantic consistency of the mixed model. Then, various functional properties can be simulated and verified within the framework. We apply this framework in the design process of a sub-system that is used in real world subway communication control system @InProceedings{ESEC/FSE13p703, author = {Yu Jiang and Zonghui Li and Hehua Zhang and Yangdong Deng and Xiaoyu Song and Ming Gu and Jiaguang Sun}, title = {Design and Optimization of Multi-clocked Embedded Systems using Formal Technique}, booktitle = {Proc.\ ESEC/FSE}, publisher = {ACM}, pages = {703--706}, doi = {}, year = {2013}, } ESEC/FSE '13-INDUSTRIAL: "System Reliability Calculation ..." System Reliability Calculation Based on the Run-Time Analysis of Ladder Program Yu Jiang , Hehua Zhang, Han Liu, Xiaoyu Song, William N. N. Hung, Ming Gu, and Jiaguang Sun (Tsinghua University, China; Portland State University, USA) Programmable logic controller (PLC) system is a typical kind of embedded system that is widely used in industry. The complexity of reliability analysis of safety critical PLC systems arises in handling the temporal correlations among the system components caused by the run-time execution logic of the embedded ladder program. In this paper, we propose a novel probabilistic model for the reliability analysis of PLC systems, called run-time reliability model (RRM). It is constructed based on the structure and run-time execution of the embedded ladder program, automatically. Then, we present some custom-made conditional probability distribution (CPD) tables according to the execution semantics of the RRM nodes, and insert the reliability probability of each system component referenced by the node into the corresponding CPD table. The proposed model is accurate and fast compared to previous work as described in the experiment results. @InProceedings{ESEC/FSE13p695, author = {Yu Jiang and Hehua Zhang and Han Liu and Xiaoyu Song and William N. N. Hung and Ming Gu and Jiaguang Sun}, title = {System Reliability Calculation Based on the Run-Time Analysis of Ladder Program}, booktitle = {Proc.\ ESEC/FSE}, publisher = {ACM}, pages = {695--698}, doi = {}, year = {2013}, } |
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Sun, Jiaguang |
ESEC/FSE '13-INDUSTRIAL: "Design and Optimization of ..."
Design and Optimization of Multi-clocked Embedded Systems using Formal Technique
Yu Jiang , Zonghui Li, Hehua Zhang, Yangdong Deng, Xiaoyu Song, Ming Gu, and Jiaguang Sun (Tsinghua University, China; Portland State University, USA) Today’s system-on-chip and distributed systems are commonly equipped with multiple clocks. The key challenge in designing such systems is that heterogenous control-oriented and data-oriented behaviors within one clock domain, and asynchronous communications between two clock domains have to be captured and evaluated in a single framework. In this paper, we propose to use timed automata and synchronous dataflow to capture the dynamic behaviors of multi-clock embedded systems. A timed automata and synchronous dataflow based modeling and analyzing framework is constructed to evaluate and optimize the performance of multiclock embedded systems. Data-oriented behaviors are captured by synchronous dataflow, while synchronous control-oriented behaviors are captured by timed automata, and inter clock-domain asynchronous communication can be modeled in an interface timed automaton or a synchronous dataflow module with the CSP mechanism. The behaviors of synchronous dataflow are interpreted by some equivalent timed automata to maintain the semantic consistency of the mixed model. Then, various functional properties can be simulated and verified within the framework. We apply this framework in the design process of a sub-system that is used in real world subway communication control system @InProceedings{ESEC/FSE13p703, author = {Yu Jiang and Zonghui Li and Hehua Zhang and Yangdong Deng and Xiaoyu Song and Ming Gu and Jiaguang Sun}, title = {Design and Optimization of Multi-clocked Embedded Systems using Formal Technique}, booktitle = {Proc.\ ESEC/FSE}, publisher = {ACM}, pages = {703--706}, doi = {}, year = {2013}, } ESEC/FSE '13-INDUSTRIAL: "System Reliability Calculation ..." System Reliability Calculation Based on the Run-Time Analysis of Ladder Program Yu Jiang , Hehua Zhang, Han Liu, Xiaoyu Song, William N. N. Hung, Ming Gu, and Jiaguang Sun (Tsinghua University, China; Portland State University, USA) Programmable logic controller (PLC) system is a typical kind of embedded system that is widely used in industry. The complexity of reliability analysis of safety critical PLC systems arises in handling the temporal correlations among the system components caused by the run-time execution logic of the embedded ladder program. In this paper, we propose a novel probabilistic model for the reliability analysis of PLC systems, called run-time reliability model (RRM). It is constructed based on the structure and run-time execution of the embedded ladder program, automatically. Then, we present some custom-made conditional probability distribution (CPD) tables according to the execution semantics of the RRM nodes, and insert the reliability probability of each system component referenced by the node into the corresponding CPD table. The proposed model is accurate and fast compared to previous work as described in the experiment results. @InProceedings{ESEC/FSE13p695, author = {Yu Jiang and Hehua Zhang and Han Liu and Xiaoyu Song and William N. N. Hung and Ming Gu and Jiaguang Sun}, title = {System Reliability Calculation Based on the Run-Time Analysis of Ladder Program}, booktitle = {Proc.\ ESEC/FSE}, publisher = {ACM}, pages = {695--698}, doi = {}, year = {2013}, } |
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Terekhov, Andrey |
ESEC/FSE '13-INDUSTRIAL: "Good Technology Makes the ..."
Good Technology Makes the Difficult Task Easy
Andrey Terekhov (Saint-Petersburg State University, Russia) A new language for chip design is presented. The main advantages of the language are explicit conveyer and parallel features fully controlled by the author of chip design. Non trivial industrial example is under discussion. There are run-time estimations and comparison with traditional programming in C. @InProceedings{ESEC/FSE13p683, author = {Andrey Terekhov}, title = {Good Technology Makes the Difficult Task Easy}, booktitle = {Proc.\ ESEC/FSE}, publisher = {ACM}, pages = {683--686}, doi = {}, year = {2013}, } |
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Watanabe, Konosuke |
ESEC/FSE '13-INDUSTRIAL: "ShAir: Extensible Middleware ..."
ShAir: Extensible Middleware for Mobile Peer-to-Peer Resource Sharing
Daniel J. Dubois, Yosuke Bando, Konosuke Watanabe, and Henry Holtzman (Massachusetts Institute of Technology, USA; Toshiba, Japan) ShAir is a middleware infrastructure that allows mobile applications to share resources of their devices (e.g., data, storage, connectivity, computation) in a transparent way. The goals of ShAir are: (i) abstracting the creation and maintenance of opportunistic delay-tolerant peer-to-peer networks; (ii) being decoupled from the actual hardware and network platform; (iii) extensibility in terms of supported hardware, protocols, and on the type of resources that can be shared; (iv) being capable of self-adapting at run-time; (v) enabling the development of applications that are easier to design, test, and simulate. In this paper we discuss the design, extensibility, and maintainability of the ShAir middleware, and how to use it as a platform for collaborative resource-sharing applications. Finally we show our experience in designing and testing a file-sharing application. @InProceedings{ESEC/FSE13p687, author = {Daniel J. Dubois and Yosuke Bando and Konosuke Watanabe and Henry Holtzman}, title = {ShAir: Extensible Middleware for Mobile Peer-to-Peer Resource Sharing}, booktitle = {Proc.\ ESEC/FSE}, publisher = {ACM}, pages = {687--690}, doi = {}, year = {2013}, } Info |
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Zhang, Hehua |
ESEC/FSE '13-INDUSTRIAL: "Design and Optimization of ..."
Design and Optimization of Multi-clocked Embedded Systems using Formal Technique
Yu Jiang , Zonghui Li, Hehua Zhang, Yangdong Deng, Xiaoyu Song, Ming Gu, and Jiaguang Sun (Tsinghua University, China; Portland State University, USA) Today’s system-on-chip and distributed systems are commonly equipped with multiple clocks. The key challenge in designing such systems is that heterogenous control-oriented and data-oriented behaviors within one clock domain, and asynchronous communications between two clock domains have to be captured and evaluated in a single framework. In this paper, we propose to use timed automata and synchronous dataflow to capture the dynamic behaviors of multi-clock embedded systems. A timed automata and synchronous dataflow based modeling and analyzing framework is constructed to evaluate and optimize the performance of multiclock embedded systems. Data-oriented behaviors are captured by synchronous dataflow, while synchronous control-oriented behaviors are captured by timed automata, and inter clock-domain asynchronous communication can be modeled in an interface timed automaton or a synchronous dataflow module with the CSP mechanism. The behaviors of synchronous dataflow are interpreted by some equivalent timed automata to maintain the semantic consistency of the mixed model. Then, various functional properties can be simulated and verified within the framework. We apply this framework in the design process of a sub-system that is used in real world subway communication control system @InProceedings{ESEC/FSE13p703, author = {Yu Jiang and Zonghui Li and Hehua Zhang and Yangdong Deng and Xiaoyu Song and Ming Gu and Jiaguang Sun}, title = {Design and Optimization of Multi-clocked Embedded Systems using Formal Technique}, booktitle = {Proc.\ ESEC/FSE}, publisher = {ACM}, pages = {703--706}, doi = {}, year = {2013}, } ESEC/FSE '13-INDUSTRIAL: "System Reliability Calculation ..." System Reliability Calculation Based on the Run-Time Analysis of Ladder Program Yu Jiang , Hehua Zhang, Han Liu, Xiaoyu Song, William N. N. Hung, Ming Gu, and Jiaguang Sun (Tsinghua University, China; Portland State University, USA) Programmable logic controller (PLC) system is a typical kind of embedded system that is widely used in industry. The complexity of reliability analysis of safety critical PLC systems arises in handling the temporal correlations among the system components caused by the run-time execution logic of the embedded ladder program. In this paper, we propose a novel probabilistic model for the reliability analysis of PLC systems, called run-time reliability model (RRM). It is constructed based on the structure and run-time execution of the embedded ladder program, automatically. Then, we present some custom-made conditional probability distribution (CPD) tables according to the execution semantics of the RRM nodes, and insert the reliability probability of each system component referenced by the node into the corresponding CPD table. The proposed model is accurate and fast compared to previous work as described in the experiment results. @InProceedings{ESEC/FSE13p695, author = {Yu Jiang and Hehua Zhang and Han Liu and Xiaoyu Song and William N. N. Hung and Ming Gu and Jiaguang Sun}, title = {System Reliability Calculation Based on the Run-Time Analysis of Ladder Program}, booktitle = {Proc.\ ESEC/FSE}, publisher = {ACM}, pages = {695--698}, doi = {}, year = {2013}, } |
27 authors
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